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[clang][RISCV] Add big-endian RISC-V target support
Several things addressed: - Define riscv32be/riscv64be target triples - Set correct data layout for BE targets - Handle BE-specific ABI details - Emit warning for BE case since it is still experimental
1 parent dd0fc25 commit 8656877

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22 files changed

+160
-20
lines changed

22 files changed

+160
-20
lines changed

‎clang/include/clang/Basic/Attr.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -476,7 +476,7 @@ def TargetMips32 : TargetArch<["mips", "mipsel"]>;
476476
def TargetAnyMips : TargetArch<["mips", "mipsel", "mips64", "mips64el"]>;
477477
def TargetMSP430 : TargetArch<["msp430"]>;
478478
def TargetM68k : TargetArch<["m68k"]>;
479-
def TargetRISCV : TargetArch<["riscv32", "riscv64"]>;
479+
def TargetRISCV : TargetArch<["riscv32", "riscv64", "riscv32be", "riscv64be"]>;
480480
def TargetX86 : TargetArch<["x86"]>;
481481
def TargetX86_64 : TargetArch<["x86_64"]>;
482482
def TargetAnyX86 : TargetArch<["x86", "x86_64"]>;

‎clang/include/clang/Basic/DiagnosticDriverKinds.td‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -419,6 +419,8 @@ def warn_ignored_clang_option : Warning<"the flag '%0' has been deprecated and w
419419
def warn_drv_unsupported_opt_for_target : Warning<
420420
"optimization flag '%0' is not supported for target '%1'">,
421421
InGroup<IgnoredOptimizationArgument>;
422+
def warn_drv_riscv_be_experimental : Warning<
423+
"big-endian RISC-V target support is experimental">;
422424
def warn_drv_unsupported_debug_info_opt_for_target : Warning<
423425
"debug information option '%0' is not supported for target '%1'">,
424426
InGroup<UnsupportedTargetOpt>;

‎clang/include/clang/Basic/ObjCRuntime.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -110,6 +110,7 @@ class ObjCRuntime {
110110
case llvm::Triple::mips64:
111111
return !(getVersion() >= VersionTuple(1, 9));
112112
case llvm::Triple::riscv64:
113+
case llvm::Triple::riscv64be:
113114
return !(getVersion() >= VersionTuple(2, 2));
114115
default:
115116
return true;

‎clang/lib/Basic/Targets.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -428,6 +428,7 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
428428
return std::make_unique<AMDGPUTargetInfo>(Triple, Opts);
429429

430430
case llvm::Triple::riscv32:
431+
case llvm::Triple::riscv32be:
431432
switch (os) {
432433
case llvm::Triple::NetBSD:
433434
return std::make_unique<NetBSDTargetInfo<RISCV32TargetInfo>>(Triple,
@@ -439,6 +440,7 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
439440
}
440441

441442
case llvm::Triple::riscv64:
443+
case llvm::Triple::riscv64be:
442444
switch (os) {
443445
case llvm::Triple::FreeBSD:
444446
return std::make_unique<FreeBSDTargetInfo<RISCV64TargetInfo>>(Triple,

‎clang/lib/Basic/Targets/OSTargets.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -255,6 +255,8 @@ class LLVM_LIBRARY_VISIBILITY FreeBSDTargetInfo : public OSTargetInfo<Target> {
255255
break;
256256
case llvm::Triple::loongarch64:
257257
case llvm::Triple::riscv64:
258+
case llvm::Triple::riscv32be:
259+
case llvm::Triple::riscv64be:
258260
break;
259261
}
260262
}
@@ -513,6 +515,8 @@ class LLVM_LIBRARY_VISIBILITY OpenBSDTargetInfo : public OSTargetInfo<Target> {
513515
break;
514516
case llvm::Triple::loongarch64:
515517
case llvm::Triple::riscv64:
518+
case llvm::Triple::riscv32be:
519+
case llvm::Triple::riscv64be:
516520
break;
517521
}
518522
}

‎clang/lib/Basic/Targets/RISCV.h‎

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -175,13 +175,17 @@ class LLVM_LIBRARY_VISIBILITY RISCV32TargetInfo : public RISCVTargetInfo {
175175
IntPtrType = SignedInt;
176176
PtrDiffType = SignedInt;
177177
SizeType = UnsignedInt;
178-
resetDataLayout("e-m:e-p:32:32-i64:64-n32-S128");
178+
resetDataLayout((Twine(Triple.isLittleEndian() ? "e" : "E") +
179+
"-m:e-p:32:32-i64:64-n32-S128")
180+
.str());
179181
}
180182

181183
bool setABI(const std::string &Name) override {
182184
if (Name == "ilp32e") {
183185
ABI = Name;
184-
resetDataLayout("e-m:e-p:32:32-i64:64-n32-S32");
186+
resetDataLayout((Twine(getTriple().isLittleEndian() ? "e" : "E") +
187+
"-m:e-p:32:32-i64:64-n32-S32")
188+
.str());
185189
return true;
186190
}
187191

@@ -205,13 +209,17 @@ class LLVM_LIBRARY_VISIBILITY RISCV64TargetInfo : public RISCVTargetInfo {
205209
: RISCVTargetInfo(Triple, Opts) {
206210
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
207211
IntMaxType = Int64Type = SignedLong;
208-
resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
212+
resetDataLayout((Twine(Triple.isLittleEndian() ? "e" : "E") +
213+
"-m:e-p:64:64-i64:64-i128:128-n32:64-S128")
214+
.str());
209215
}
210216

211217
bool setABI(const std::string &Name) override {
212218
if (Name == "lp64e") {
213219
ABI = Name;
214-
resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S64");
220+
resetDataLayout((Twine(getTriple().isLittleEndian() ? "e" : "E") +
221+
"-m:e-p:64:64-i64:64-i128:128-n32:64-S64")
222+
.str());
215223
return true;
216224
}
217225

‎clang/lib/CodeGen/CGBuiltin.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -121,6 +121,8 @@ static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF,
121121
return CGF->EmitHexagonBuiltinExpr(BuiltinID, E);
122122
case llvm::Triple::riscv32:
123123
case llvm::Triple::riscv64:
124+
case llvm::Triple::riscv32be:
125+
case llvm::Triple::riscv64be:
124126
return CGF->EmitRISCVBuiltinExpr(BuiltinID, E, ReturnValue);
125127
case llvm::Triple::spirv32:
126128
case llvm::Triple::spirv64:

‎clang/lib/CodeGen/CodeGenFunction.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2989,6 +2989,8 @@ void CodeGenFunction::EmitMultiVersionResolver(
29892989
return;
29902990
case llvm::Triple::riscv32:
29912991
case llvm::Triple::riscv64:
2992+
case llvm::Triple::riscv32be:
2993+
case llvm::Triple::riscv64be:
29922994
EmitRISCVMultiVersionResolver(Resolver, Options);
29932995
return;
29942996

‎clang/lib/CodeGen/CodeGenModule.cpp‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -223,7 +223,9 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
223223
return createMSP430TargetCodeGenInfo(CGM);
224224

225225
case llvm::Triple::riscv32:
226-
case llvm::Triple::riscv64: {
226+
case llvm::Triple::riscv64:
227+
case llvm::Triple::riscv32be:
228+
case llvm::Triple::riscv64be: {
227229
StringRef ABIStr = Target.getABI();
228230
unsigned XLen = Target.getPointerWidth(LangAS::Default);
229231
unsigned ABIFLen = 0;

‎clang/lib/Driver/Driver.cpp‎

Lines changed: 22 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -822,14 +822,30 @@ static llvm::Triple computeTargetTriple(const Driver &D,
822822
ArchName, /*EnableExperimentalExtensions=*/true);
823823
if (!llvm::errorToBool(ISAInfo.takeError())) {
824824
unsigned XLen = (*ISAInfo)->getXLen();
825-
if (XLen == 32)
826-
Target.setArch(llvm::Triple::riscv32);
827-
else if (XLen == 64)
828-
Target.setArch(llvm::Triple::riscv64);
825+
if (XLen == 32) {
826+
if (Target.isLittleEndian())
827+
Target.setArch(llvm::Triple::riscv32);
828+
else
829+
Target.setArch(llvm::Triple::riscv32be);
830+
} else if (XLen == 64) {
831+
if (Target.isLittleEndian())
832+
Target.setArch(llvm::Triple::riscv64);
833+
else
834+
Target.setArch(llvm::Triple::riscv64be);
835+
}
829836
}
830837
}
831838
}
832839

840+
if (Target.getArch() == llvm::Triple::riscv32be ||
841+
Target.getArch() == llvm::Triple::riscv64be) {
842+
static bool WarnedRISCVBE = false;
843+
if (!WarnedRISCVBE) {
844+
D.Diag(diag::warn_drv_riscv_be_experimental);
845+
WarnedRISCVBE = true;
846+
}
847+
}
848+
833849
return Target;
834850
}
835851

@@ -6957,6 +6973,8 @@ const ToolChain &Driver::getToolChain(const ArgList &Args,
69576973
break;
69586974
case llvm::Triple::riscv32:
69596975
case llvm::Triple::riscv64:
6976+
case llvm::Triple::riscv32be:
6977+
case llvm::Triple::riscv64be:
69606978
TC = std::make_unique<toolchains::BareMetal>(*this, Target, Args);
69616979
break;
69626980
case llvm::Triple::ve:

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