@@ -1140,6 +1140,10 @@ bool NVPTXDAGToDAGISel::tryLDGLDU(SDNode *N) {
11401140 SDVTList InstVTList = CurDAG->getVTList (InstVTs);
11411141 SDValue Chain = N->getOperand (0 );
11421142
1143+ SDValue Base, Offset;
1144+ SelectADDR (Op1, Base, Offset);
1145+ SDValue Ops[] = {Base, Offset, Chain};
1146+
11431147 std::optional<unsigned > Opcode;
11441148 switch (N->getOpcode ()) {
11451149 default :
@@ -1189,9 +1193,6 @@ bool NVPTXDAGToDAGISel::tryLDGLDU(SDNode *N) {
11891193 return false ;
11901194
11911195 SDLoc DL (N);
1192- SDValue Base, Offset;
1193- SelectADDR (Op1, Base, Offset);
1194- SDValue Ops[] = {Base, Offset, Chain};
11951196 SDNode *LD = CurDAG->getMachineNode (*Opcode, DL, InstVTList, Ops);
11961197
11971198 // For automatic generation of LDG (through SelectLoad[Vector], not the
@@ -2079,12 +2080,13 @@ static SDValue accumulateOffset(SDValue &Addr, SDLoc DL, SelectionDAG *DAG) {
20792080 MVT::i32 );
20802081}
20812082
2082- // Select a pair of operands which represnent a valid PTX address, this could be
2083+ // Select a pair of operands which represent a valid PTX address, this could be
20832084// one of the following things:
20842085// - [var] - Offset is simply set to 0
20852086// - [reg] - Offset is simply set to 0
20862087// - [reg+immOff]
20872088// - [var+immOff]
2089+ // Note that immOff must fit into a 32-bit signed integer.
20882090bool NVPTXDAGToDAGISel::SelectADDR (SDValue Addr, SDValue &Base,
20892091 SDValue &Offset) {
20902092 Offset = accumulateOffset (Addr, SDLoc (Addr), CurDAG);
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