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JaydeepChauhan14JaydeepChauhan14
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[X86][NFC] Moved/Updated FNEG testcases (#162269)
- Moved existing testcases from ```llvm/test/CodeGen/X86/fast-isel-fneg.ll``` to ```llvm/test/CodeGen/X86/isel-fneg.ll```. - Added **x86_fp80** testcase and **GISEL** RUN lines as precommit testcases for GISEL. - Two i686 testcases are disabled because it is crashing in later passes only for GISEL. It will resolve after adding **FNEG GISEL implementation**, I will add that in next PR.
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‎llvm/test/CodeGen/X86/fast-isel-fneg.ll‎

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‎llvm/test/CodeGen/X86/isel-fneg.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
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; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
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; DISABLED: llc < %s -mtriple=i686-linux-gnu -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
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; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel -mattr=+sse | FileCheck %s --check-prefixes=X86,SSE-X86,FASTISEL-SSE-X86
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; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 -mattr=+sse | FileCheck %s --check-prefixes=X86,SSE-X86,SDAG-SSE-X86
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; DISABLED: llc < %s -mtriple=i686-linux-gnu -global-isel=1 -global-isel-abort=2 -mattr=+sse | FileCheck %s --check-prefixes=X86,SSE-X86,GISEL-SSE-X86
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; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel -mattr=+sse | FileCheck %s --check-prefixes=X64,SSE-X64,FASTISEL-SSE-X64
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; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel=0 -fast-isel=0 -mattr=+sse | FileCheck %s --check-prefixes=X64,SSE-X64,SDAG-SSE-X64
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; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel=1 -global-isel-abort=2 -mattr=+sse | FileCheck %s --check-prefixes=X64,SSE-X64,GISEL-SSE-X64
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define double @fneg_f64(double %x) nounwind {
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; X86-LABEL: fneg_f64:
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; X86: # %bb.0:
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; X86-NEXT: fldl {{[0-9]+}}(%esp)
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; X86-NEXT: fchs
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; X86-NEXT: retl
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;
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; FASTISEL-SSE-X64-LABEL: fneg_f64:
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; FASTISEL-SSE-X64: # %bb.0:
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; FASTISEL-SSE-X64-NEXT: movq %xmm0, %rax
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; FASTISEL-SSE-X64-NEXT: movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
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; FASTISEL-SSE-X64-NEXT: xorq %rax, %rcx
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; FASTISEL-SSE-X64-NEXT: movq %rcx, %xmm0
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; FASTISEL-SSE-X64-NEXT: retq
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;
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; SDAG-SSE-X64-LABEL: fneg_f64:
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; SDAG-SSE-X64: # %bb.0:
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; SDAG-SSE-X64-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SDAG-SSE-X64-NEXT: retq
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;
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; GISEL-SSE-X64-LABEL: fneg_f64:
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; GISEL-SSE-X64: # %bb.0:
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; GISEL-SSE-X64-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
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; GISEL-SSE-X64-NEXT: movq %xmm0, %rcx
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; GISEL-SSE-X64-NEXT: xorq %rax, %rcx
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; GISEL-SSE-X64-NEXT: movq %rcx, %xmm0
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; GISEL-SSE-X64-NEXT: retq
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%y = fneg double %x
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ret double %y
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}
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define float @fneg_f32(float %x) nounwind {
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; FASTISEL-X86-LABEL: fneg_f32:
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; FASTISEL-X86: # %bb.0:
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; FASTISEL-X86-NEXT: flds {{[0-9]+}}(%esp)
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; FASTISEL-X86-NEXT: fchs
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; FASTISEL-X86-NEXT: retl
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;
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; SDAG-X86-LABEL: fneg_f32:
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; SDAG-X86: # %bb.0:
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; SDAG-X86-NEXT: flds {{[0-9]+}}(%esp)
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; SDAG-X86-NEXT: fchs
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; SDAG-X86-NEXT: retl
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;
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; SSE-X86-LABEL: fneg_f32:
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; SSE-X86: # %bb.0:
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; SSE-X86-NEXT: pushl %eax
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; SSE-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE-X86-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
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; SSE-X86-NEXT: movss %xmm0, (%esp)
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; SSE-X86-NEXT: flds (%esp)
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; SSE-X86-NEXT: popl %eax
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; SSE-X86-NEXT: retl
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;
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; FASTISEL-SSE-X64-LABEL: fneg_f32:
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; FASTISEL-SSE-X64: # %bb.0:
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; FASTISEL-SSE-X64-NEXT: movd %xmm0, %eax
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; FASTISEL-SSE-X64-NEXT: xorl $2147483648, %eax # imm = 0x80000000
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; FASTISEL-SSE-X64-NEXT: movd %eax, %xmm0
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; FASTISEL-SSE-X64-NEXT: retq
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;
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; SDAG-SSE-X64-LABEL: fneg_f32:
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; SDAG-SSE-X64: # %bb.0:
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; SDAG-SSE-X64-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SDAG-SSE-X64-NEXT: retq
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;
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; GISEL-SSE-X64-LABEL: fneg_f32:
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; GISEL-SSE-X64: # %bb.0:
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; GISEL-SSE-X64-NEXT: movd %xmm0, %eax
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; GISEL-SSE-X64-NEXT: addl $-2147483648, %eax # imm = 0x80000000
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; GISEL-SSE-X64-NEXT: movd %eax, %xmm0
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; GISEL-SSE-X64-NEXT: retq
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%y = fneg float %x
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ret float %y
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}
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define void @fneg_f64_mem(ptr %x, ptr %y) nounwind {
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; X86-LABEL: fneg_f64_mem:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: fldl (%ecx)
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; X86-NEXT: fchs
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; X86-NEXT: fstpl (%eax)
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; X86-NEXT: retl
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;
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; FASTISEL-SSE-X64-LABEL: fneg_f64_mem:
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; FASTISEL-SSE-X64: # %bb.0:
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; FASTISEL-SSE-X64-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
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; FASTISEL-SSE-X64-NEXT: movq %xmm0, %rax
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; FASTISEL-SSE-X64-NEXT: movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
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; FASTISEL-SSE-X64-NEXT: xorq %rax, %rcx
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; FASTISEL-SSE-X64-NEXT: movq %rcx, %xmm0
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; FASTISEL-SSE-X64-NEXT: movq %xmm0, (%rsi)
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; FASTISEL-SSE-X64-NEXT: retq
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;
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; SDAG-SSE-X64-LABEL: fneg_f64_mem:
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; SDAG-SSE-X64: # %bb.0:
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; SDAG-SSE-X64-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
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; SDAG-SSE-X64-NEXT: xorq (%rdi), %rax
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; SDAG-SSE-X64-NEXT: movq %rax, (%rsi)
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; SDAG-SSE-X64-NEXT: retq
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;
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; GISEL-SSE-X64-LABEL: fneg_f64_mem:
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; GISEL-SSE-X64: # %bb.0:
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; GISEL-SSE-X64-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
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; GISEL-SSE-X64-NEXT: xorq (%rdi), %rax
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; GISEL-SSE-X64-NEXT: movq %rax, (%rsi)
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; GISEL-SSE-X64-NEXT: retq
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%a = load double, ptr %x
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%b = fneg double %a
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store double %b, ptr %y
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ret void
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}
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define void @fneg_f32_mem(ptr %x, ptr %y) nounwind {
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; FASTISEL-X86-LABEL: fneg_f32_mem:
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; FASTISEL-X86: # %bb.0:
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; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; FASTISEL-X86-NEXT: movl $-2147483648, %edx # imm = 0x80000000
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; FASTISEL-X86-NEXT: xorl (%ecx), %edx
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; FASTISEL-X86-NEXT: movl %edx, (%eax)
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; FASTISEL-X86-NEXT: retl
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;
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; SDAG-X86-LABEL: fneg_f32_mem:
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; SDAG-X86: # %bb.0:
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; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; SDAG-X86-NEXT: movl $-2147483648, %edx # imm = 0x80000000
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; SDAG-X86-NEXT: xorl (%ecx), %edx
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; SDAG-X86-NEXT: movl %edx, (%eax)
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; SDAG-X86-NEXT: retl
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;
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; FASTISEL-SSE-X86-LABEL: fneg_f32_mem:
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; FASTISEL-SSE-X86: # %bb.0:
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; FASTISEL-SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; FASTISEL-SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; FASTISEL-SSE-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; FASTISEL-SSE-X86-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
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; FASTISEL-SSE-X86-NEXT: movss %xmm0, (%eax)
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; FASTISEL-SSE-X86-NEXT: retl
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;
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; SDAG-SSE-X86-LABEL: fneg_f32_mem:
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; SDAG-SSE-X86: # %bb.0:
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; SDAG-SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SDAG-SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; SDAG-SSE-X86-NEXT: movl $-2147483648, %edx # imm = 0x80000000
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; SDAG-SSE-X86-NEXT: xorl (%ecx), %edx
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; SDAG-SSE-X86-NEXT: movl %edx, (%eax)
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; SDAG-SSE-X86-NEXT: retl
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;
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; FASTISEL-SSE-X64-LABEL: fneg_f32_mem:
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; FASTISEL-SSE-X64: # %bb.0:
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; FASTISEL-SSE-X64-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; FASTISEL-SSE-X64-NEXT: movd %xmm0, %eax
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; FASTISEL-SSE-X64-NEXT: xorl $2147483648, %eax # imm = 0x80000000
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; FASTISEL-SSE-X64-NEXT: movd %eax, %xmm0
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; FASTISEL-SSE-X64-NEXT: movd %xmm0, (%rsi)
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; FASTISEL-SSE-X64-NEXT: retq
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;
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; SDAG-SSE-X64-LABEL: fneg_f32_mem:
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; SDAG-SSE-X64: # %bb.0:
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; SDAG-SSE-X64-NEXT: movl $-2147483648, %eax # imm = 0x80000000
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; SDAG-SSE-X64-NEXT: xorl (%rdi), %eax
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; SDAG-SSE-X64-NEXT: movl %eax, (%rsi)
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; SDAG-SSE-X64-NEXT: retq
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;
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; GISEL-SSE-X64-LABEL: fneg_f32_mem:
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; GISEL-SSE-X64: # %bb.0:
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; GISEL-SSE-X64-NEXT: movl $-2147483648, %eax # imm = 0x80000000
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; GISEL-SSE-X64-NEXT: xorl (%rdi), %eax
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; GISEL-SSE-X64-NEXT: movl %eax, (%rsi)
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; GISEL-SSE-X64-NEXT: retq
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%a = load float, ptr %x
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%b = fneg float %a
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store float %b, ptr %y
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ret void
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}
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define x86_fp80 @test_fp80(x86_fp80 %a) nounwind {
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; X86-LABEL: test_fp80:
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; X86: # %bb.0:
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; X86-NEXT: fldt {{[0-9]+}}(%esp)
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; X86-NEXT: fchs
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; X86-NEXT: retl
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;
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; X64-LABEL: test_fp80:
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; X64: # %bb.0:
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; X64-NEXT: fldt {{[0-9]+}}(%rsp)
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; X64-NEXT: fchs
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; X64-NEXT: retq
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%1 = fneg x86_fp80 %a
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ret x86_fp80 %1
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}
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; SSE-X64: {{.*}}

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