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[SelectionDAG] Correctly reduce BV to shuffle with zero on big endian
This DAG combine is correct on little endian targets but is incorrect on big endian targets. Add big endian code to correct it. Differential revision: https://reviews.llvm.org/D146460
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‎llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -21361,10 +21361,9 @@ static SDValue reduceBuildVecToShuffleWithZero(SDNode *BV, SelectionDAG &DAG) {
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// the source vector. The high bits map to zero. We will use a zero vector
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// as the 2nd source operand of the shuffle, so use the 1st element of
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// that vector (mask value is number-of-elements) for the high bits.
21364-
if (i % ZextRatio == 0)
21365-
ShufMask[i] = Extract.getConstantOperandVal(1);
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else
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ShufMask[i] = NumMaskElts;
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int Low = DAG.getDataLayout().isBigEndian() ? (ZextRatio - 1) : 0;
21365+
ShufMask[i] = (i % ZextRatio == Low) ? Extract.getConstantOperandVal(1)
21366+
: NumMaskElts;
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}
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// Undef elements of the build vector remain undef because we initialize

‎llvm/test/CodeGen/PowerPC/pr61315.ll

Lines changed: 133 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,133 @@
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; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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; RUN: -mcpu=pwr9 -mtriple=powerpc64 < %s | FileCheck %s
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define dso_local <16 x i8> @ConvertExtractedMaskBitsToVect(<16 x i8> noundef %0) local_unnamed_addr #0 {
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; CHECK: .LCPI0_0:
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-LABEL: ConvertExtractedMaskBitsToVect:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addis r3, r2, .LCPI0_0@toc@ha
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; CHECK-NEXT: xxlxor v4, v4, v4
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; CHECK-NEXT: xxlxor v3, v3, v3
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; CHECK-NEXT: addi r3, r3, .LCPI0_0@toc@l
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; CHECK-NEXT: lxv vs0, 0(r3)
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; CHECK-NEXT: addis r3, r2, .LCPI0_1@toc@ha
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; CHECK-NEXT: addi r3, r3, .LCPI0_1@toc@l
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; CHECK-NEXT: xxperm v4, v2, vs0
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; CHECK-NEXT: lxv vs0, 0(r3)
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; CHECK-NEXT: xxland v2, v4, vs0
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; CHECK-NEXT: vcmpequb v2, v2, v3
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; CHECK-NEXT: xxlnor v2, v2, v2
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; CHECK-NEXT: blr
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%a4 = extractelement <16 x i8> %0, i64 7
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%a5 = zext i8 %a4 to i16
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%a6 = insertelement <8 x i16> poison, i16 %a5, i64 0
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%a7 = bitcast <8 x i16> %a6 to <16 x i8>
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%a8 = shufflevector <16 x i8> %a7, <16 x i8> undef, <16 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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%a9 = and <16 x i8> %a8, <i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128>
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%a10 = icmp eq <16 x i8> %a9, <i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128>
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%a11 = sext <16 x i1> %a10 to <16 x i8>
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ret <16 x i8> %a11
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}
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define dso_local <16 x i8> @ConvertExtractedMaskBitsToVect2(<16 x i8> noundef %0) local_unnamed_addr #0 {
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; CHECK: .LCPI1_0:
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-LABEL: ConvertExtractedMaskBitsToVect2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addis r3, r2, .LCPI1_0@toc@ha
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; CHECK-NEXT: xxlxor v4, v4, v4
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; CHECK-NEXT: xxlxor v3, v3, v3
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; CHECK-NEXT: addi r3, r3, .LCPI1_0@toc@l
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; CHECK-NEXT: lxv vs0, 0(r3)
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; CHECK-NEXT: addis r3, r2, .LCPI1_1@toc@ha
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; CHECK-NEXT: addi r3, r3, .LCPI1_1@toc@l
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; CHECK-NEXT: xxperm v4, v2, vs0
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; CHECK-NEXT: lxv vs0, 0(r3)
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; CHECK-NEXT: xxland v2, v4, vs0
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; CHECK-NEXT: vcmpequb v2, v2, v3
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; CHECK-NEXT: xxlnor v2, v2, v2
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; CHECK-NEXT: blr
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%a4 = extractelement <16 x i8> %0, i64 7
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%a5 = zext i8 %a4 to i32
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%a6 = insertelement <4 x i32> poison, i32 %a5, i64 0
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%a7 = bitcast <4 x i32> %a6 to <16 x i8>
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%a8 = shufflevector <16 x i8> %a7, <16 x i8> undef, <16 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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%a9 = and <16 x i8> %a8, <i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128>
86+
%a10 = icmp eq <16 x i8> %a9, <i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128>
87+
%a11 = sext <16 x i1> %a10 to <16 x i8>
88+
ret <16 x i8> %a11
89+
}
90+
91+
define dso_local <16 x i8> @ConvertExtractedMaskBitsToVect3(<8 x i16> noundef %0) local_unnamed_addr #0 {
92+
; CHECK: .LCPI2_0:
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; CHECK-NEXT: .byte 6 # 0x6
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 6 # 0x6
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 6 # 0x6
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 6 # 0x6
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; CHECK-NEXT: .byte 7 # 0x7
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-NEXT: .byte 16 # 0x10
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; CHECK-LABEL: ConvertExtractedMaskBitsToVect3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addis r3, r2, .LCPI2_0@toc@ha
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; CHECK-NEXT: xxlxor v4, v4, v4
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; CHECK-NEXT: xxlxor v3, v3, v3
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; CHECK-NEXT: addi r3, r3, .LCPI2_0@toc@l
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; CHECK-NEXT: lxv vs0, 0(r3)
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; CHECK-NEXT: addis r3, r2, .LCPI2_1@toc@ha
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; CHECK-NEXT: addi r3, r3, .LCPI2_1@toc@l
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; CHECK-NEXT: xxperm v4, v2, vs0
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; CHECK-NEXT: lxv vs0, 0(r3)
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; CHECK-NEXT: xxland v2, v4, vs0
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; CHECK-NEXT: vcmpequb v2, v2, v3
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; CHECK-NEXT: xxlnor v2, v2, v2
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; CHECK-NEXT: blr
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%a4 = extractelement <8 x i16> %0, i64 3
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%a5 = zext i16 %a4 to i32
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%a6 = insertelement <4 x i32> poison, i32 %a5, i64 0
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%a7 = bitcast <4 x i32> %a6 to <16 x i8>
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%a8 = shufflevector <16 x i8> %a7, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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%a9 = and <16 x i8> %a8, <i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128>
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%a10 = icmp eq <16 x i8> %a9, <i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128>
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%a11 = sext <16 x i1> %a10 to <16 x i8>
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ret <16 x i8> %a11
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}

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