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[RISC-V] Allow intrinsics to be used with any pointer type. (#139634)
RISC-V does not use address spaces and leaves them available for user code to make use of. Intrinsics, however, required pointer types to use the default address space, complicating handling during lowering to handle non-default address spaces. When the intrinsics are overloaded, this is handled without extra effort. This commit does not yet update Clang builtin functions to also permit pointers to non-default address spaces.
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‎clang/include/clang/Basic/riscv_vector.td‎

Lines changed: 42 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@ class IsFloat<string type> {
2626

2727
let SupportOverloading = false,
2828
MaskedPolicyScheme = NonePolicy in {
29-
class RVVVLEMaskBuiltin : RVVOutBuiltin<"m", "mPCUe", "c"> {
29+
class RVVVLEMaskBuiltin : RVVOutOp0Builtin<"m", "mPCUe", "c"> {
3030
let Name = "vlm_v";
3131
let IRName = "vlm";
3232
let HasMasked = false;
@@ -40,9 +40,9 @@ let SupportOverloading = false,
4040
IRName = "vle",
4141
MaskedIRName ="vle_mask" in {
4242
foreach type = types in {
43-
def : RVVOutBuiltin<"v", "vPCe", type>;
43+
def : RVVOutOp0Builtin<"v", "vPCe", type>;
4444
if !not(IsFloat<type>.val) then {
45-
def : RVVOutBuiltin<"Uv", "UvPCUe", type>;
45+
def : RVVOutOp0Builtin<"Uv", "UvPCUe", type>;
4646
}
4747
}
4848
}
@@ -63,11 +63,11 @@ multiclass RVVVLEFFBuiltin<list<string> types> {
6363
if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA))
6464
Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
6565
Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
66-
IntrinsicTypes = {ResultType, Ops[4]->getType()};
66+
IntrinsicTypes = {ResultType, Ops[4]->getType(), Ops[2]->getType()};
6767
} else {
6868
if (PolicyAttrs & RVV_VTA)
6969
Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
70-
IntrinsicTypes = {ResultType, Ops[3]->getType()};
70+
IntrinsicTypes = {ResultType, Ops[3]->getType(), Ops[1]->getType()};
7171
}
7272
Value *NewVL = Ops[2];
7373
Ops.erase(Ops.begin() + 2);
@@ -102,9 +102,9 @@ multiclass RVVVLSEBuiltin<list<string> types> {
102102
SupportOverloading = false,
103103
UnMaskedPolicyScheme = HasPassthruOperand in {
104104
foreach type = types in {
105-
def : RVVOutBuiltin<"v", "vPCet", type>;
105+
def : RVVOutOp0Builtin<"v", "vPCet", type>;
106106
if !not(IsFloat<type>.val) then {
107-
def : RVVOutBuiltin<"Uv", "UvPCUet", type>;
107+
def : RVVOutOp0Builtin<"Uv", "UvPCUet", type>;
108108
}
109109
}
110110
}
@@ -120,9 +120,9 @@ multiclass RVVIndexedLoad<string op> {
120120
RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin"],
121121
!if(!eq(type, "y"), ["Zvfbfmin"],
122122
[]<string>)) in {
123-
def: RVVOutOp1Builtin<"v", "vPCe" # eew_type # "Uv", type>;
123+
def: RVVOutOp0Op1Builtin<"v", "vPCe" # eew_type # "Uv", type>;
124124
if !not(IsFloat<type>.val) then {
125-
def: RVVOutOp1Builtin<"Uv", "UvPCUe" # eew_type # "Uv", type>;
125+
def: RVVOutOp0Op1Builtin<"Uv", "UvPCUe" # eew_type # "Uv", type>;
126126
}
127127
}
128128
}
@@ -132,9 +132,9 @@ multiclass RVVIndexedLoad<string op> {
132132
RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin", "RV64"],
133133
!if(!eq(type, "y"), ["Zvfbfmin", "RV64"],
134134
["RV64"])) in {
135-
def: RVVOutOp1Builtin<"v", "vPCe" # eew64_type # "Uv", type>;
135+
def: RVVOutOp0Op1Builtin<"v", "vPCe" # eew64_type # "Uv", type>;
136136
if !not(IsFloat<type>.val) then {
137-
def: RVVOutOp1Builtin<"Uv", "UvPCUe" # eew64_type # "Uv", type>;
137+
def: RVVOutOp0Op1Builtin<"Uv", "UvPCUe" # eew64_type # "Uv", type>;
138138
}
139139
}
140140
}
@@ -152,9 +152,9 @@ let HasMaskedOffOperand = false,
152152
std::swap(Ops[0], Ops[1]);
153153
}
154154
if (IsMasked)
155-
IntrinsicTypes = {Ops[0]->getType(), Ops[3]->getType()};
155+
IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[3]->getType()};
156156
else
157-
IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType()};
157+
IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType()};
158158
}] in {
159159
class RVVVSEMaskBuiltin : RVVBuiltin<"m", "0PUem", "c"> {
160160
let Name = "vsm_v";
@@ -190,9 +190,9 @@ multiclass RVVVSSEBuiltin<list<string> types> {
190190
std::rotate(Ops.begin(), Ops.begin() + 2, Ops.begin() + 3);
191191
}
192192
if (IsMasked)
193-
IntrinsicTypes = {Ops[0]->getType(), Ops[4]->getType()};
193+
IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[4]->getType()};
194194
else
195-
IntrinsicTypes = {Ops[0]->getType(), Ops[3]->getType()};
195+
IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[3]->getType()};
196196
}] in {
197197
foreach type = types in {
198198
def : RVVBuiltin<"v", "0Petv", type>;
@@ -215,9 +215,9 @@ multiclass RVVIndexedStore<string op> {
215215
std::rotate(Ops.begin(), Ops.begin() + 2, Ops.begin() + 3);
216216
}
217217
if (IsMasked)
218-
IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType(), Ops[4]->getType()};
218+
IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[4]->getType()};
219219
else
220-
IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType(), Ops[3]->getType()};
220+
IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType()};
221221
}] in {
222222
foreach type = TypeList in {
223223
foreach eew_list = EEWList[0-2] in {
@@ -762,17 +762,18 @@ multiclass RVVUnitStridedSegLoadTuple<string op> {
762762
[]<string>)),
763763
ManualCodegen = [{
764764
{
765-
if (IsMasked)
766-
IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops.back()->getType()};
767-
else
768-
IntrinsicTypes = {ResultType, Ops.back()->getType()};
769765
SmallVector<llvm::Value*, 6> Operands;
770766

771767
bool NoPassthru =
772768
(IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) |
773769
(!IsMasked && (PolicyAttrs & RVV_VTA));
774770
unsigned Offset = IsMasked ? NoPassthru ? 1 : 2 : NoPassthru ? 0 : 1;
775771

772+
if (IsMasked)
773+
IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Ops[0]->getType(), Ops.back()->getType()};
774+
else
775+
IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Ops.back()->getType()};
776+
776777
if (NoPassthru) { // Push poison into passthru
777778
Operands.push_back(llvm::PoisonValue::get(ResultType));
778779
} else { // Push intrinsics operands into passthru
@@ -845,9 +846,9 @@ multiclass RVVUnitStridedSegStoreTuple<string op> {
845846
Operands.push_back(ConstantInt::get(Ops.back()->getType(), SegInstSEW));
846847

847848
if (IsMasked)
848-
IntrinsicTypes = {Operands[0]->getType(), Ops[0]->getType(), Operands.back()->getType()};
849+
IntrinsicTypes = {Operands[0]->getType(), Ops[Offset]->getType(), Ops[0]->getType(), Operands.back()->getType()};
849850
else
850-
IntrinsicTypes = {Operands[0]->getType(), Operands.back()->getType()};
851+
IntrinsicTypes = {Operands[0]->getType(), Ops[Offset]->getType(), Operands.back()->getType()};
851852
llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
852853
return Builder.CreateCall(F, Operands, "");
853854
}
@@ -882,17 +883,18 @@ multiclass RVVUnitStridedSegLoadFFTuple<string op> {
882883
[]<string>)),
883884
ManualCodegen = [{
884885
{
885-
if (IsMasked)
886-
IntrinsicTypes = {ResultType, Ops.back()->getType(), Ops[0]->getType()};
887-
else
888-
IntrinsicTypes = {ResultType, Ops.back()->getType()};
889886
SmallVector<llvm::Value*, 6> Operands;
890887

891888
bool NoPassthru =
892889
(IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) |
893890
(!IsMasked && (PolicyAttrs & RVV_VTA));
894891
unsigned Offset = IsMasked ? NoPassthru ? 1 : 2 : NoPassthru ? 0 : 1;
895892

893+
if (IsMasked)
894+
IntrinsicTypes = {ResultType, Ops.back()->getType(), Ops[Offset]->getType(), Ops[0]->getType()};
895+
else
896+
IntrinsicTypes = {ResultType, Ops.back()->getType(), Ops[Offset]->getType()};
897+
896898
if (NoPassthru) { // Push poison into passthru
897899
Operands.push_back(llvm::PoisonValue::get(ResultType));
898900
} else { // Push intrinsics operands into passthru
@@ -957,17 +959,18 @@ multiclass RVVStridedSegLoadTuple<string op> {
957959
[]<string>)),
958960
ManualCodegen = [{
959961
{
960-
if (IsMasked)
961-
IntrinsicTypes = {ResultType, Ops.back()->getType(), Ops[0]->getType()};
962-
else
963-
IntrinsicTypes = {ResultType, Ops.back()->getType()};
964962
SmallVector<llvm::Value*, 7> Operands;
965963

966964
bool NoPassthru =
967965
(IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) |
968966
(!IsMasked && (PolicyAttrs & RVV_VTA));
969967
unsigned Offset = IsMasked ? NoPassthru ? 1 : 2 : NoPassthru ? 0 : 1;
970968

969+
if (IsMasked)
970+
IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Ops.back()->getType(), Ops[0]->getType()};
971+
else
972+
IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Ops.back()->getType()};
973+
971974
if (NoPassthru) { // Push poison into passthru
972975
Operands.push_back(llvm::PoisonValue::get(ResultType));
973976
} else { // Push intrinsics operands into passthru
@@ -1043,9 +1046,9 @@ multiclass RVVStridedSegStoreTuple<string op> {
10431046
Operands.push_back(ConstantInt::get(Ops.back()->getType(), SegInstSEW));
10441047

10451048
if (IsMasked)
1046-
IntrinsicTypes = {Operands[0]->getType(), Operands.back()->getType(), Ops[0]->getType()};
1049+
IntrinsicTypes = {Operands[0]->getType(), Operands[1]->getType(), Operands.back()->getType(), Ops[0]->getType()};
10471050
else
1048-
IntrinsicTypes = {Operands[0]->getType(), Operands.back()->getType()};
1051+
IntrinsicTypes = {Operands[0]->getType(), Operands[1]->getType(), Operands.back()->getType()};
10491052
llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
10501053
return Builder.CreateCall(F, Operands, "");
10511054
}
@@ -1099,11 +1102,13 @@ multiclass RVVIndexedSegLoadTuple<string op> {
10991102
Operands.push_back(ConstantInt::get(Ops.back()->getType(), SegInstSEW));
11001103

11011104
if (IsMasked)
1102-
IntrinsicTypes = {ResultType, Ops[Offset + 1]->getType(),
1105+
IntrinsicTypes = {ResultType, Ops[Offset]->getType(),
1106+
Ops[Offset + 1]->getType(),
11031107
Ops[0]->getType(),
11041108
Ops.back()->getType()};
11051109
else
1106-
IntrinsicTypes = {ResultType, Ops[Offset + 1]->getType(),
1110+
IntrinsicTypes = {ResultType, Ops[Offset]->getType(),
1111+
Ops[Offset + 1]->getType(),
11071112
Ops.back()->getType()};
11081113
llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
11091114
llvm::Value *LoadValue = Builder.CreateCall(F, Operands, "");
@@ -1160,11 +1165,11 @@ multiclass RVVIndexedSegStoreTuple<string op> {
11601165
Operands.push_back(ConstantInt::get(Ops.back()->getType(), SegInstSEW));
11611166

11621167
if (IsMasked)
1163-
IntrinsicTypes = {Operands[0]->getType(), Ops[Offset + 1]->getType(),
1168+
IntrinsicTypes = {Operands[0]->getType(), Ops[Offset]->getType(), Ops[Offset + 1]->getType(),
11641169
Ops[0]->getType(),
11651170
Operands.back()->getType()};
11661171
else
1167-
IntrinsicTypes = {Operands[0]->getType(), Ops[Offset + 1]->getType(),
1172+
IntrinsicTypes = {Operands[0]->getType(), Ops[Offset]->getType(), Ops[Offset + 1]->getType(),
11681173
Operands.back()->getType()};
11691174
llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
11701175
return Builder.CreateCall(F, Operands, "");

‎clang/include/clang/Basic/riscv_vector_common.td‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -266,6 +266,11 @@ class RVVOp0Builtin<string suffix, string prototype, string type_range>
266266
let IntrinsicTypes = [0];
267267
}
268268

269+
class RVVOutOp0Builtin<string suffix, string prototype, string type_range>
270+
: RVVBuiltin<suffix, prototype, type_range> {
271+
let IntrinsicTypes = [-1, 0];
272+
}
273+
269274
class RVVOutOp1Builtin<string suffix, string prototype, string type_range>
270275
: RVVBuiltin<suffix, prototype, type_range> {
271276
let IntrinsicTypes = [-1, 1];

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