[AMDGPU] Fix buffer offset validation per PR feedback 3

Author: aleksandar-amd

llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

@@ -4782,13 +4782,13 @@ bool AMDGPUAsmParser::validateOffset(const MCInst &Inst,
     return validateSMEMOffset(Inst, Operands);
 
   const auto &Op = Inst.getOperand(OpNum);
-  // GFX12+ buffer ops: InstOffset is signed 24, but must be positive
+  // GFX12+ buffer ops: InstOffset is signed 24, but must not be a negative.
   if (isGFX12Plus() &&
       (TSFlags & (SIInstrFlags::MUBUF | SIInstrFlags::MTBUF))) {
     const unsigned OffsetSize = 24;
     if (!isUIntN(OffsetSize - 1, Op.getImm())) {
       Error(getFlatOffsetLoc(Operands),
-            Twine("expected a ") + Twine(OffsetSize - 1) + "-bit non-negative offset for buffer ops");
+            Twine("expected a ") + Twine(OffsetSize - 1) + "-bit unsigned offset for buffer ops");
       return false;
     }
   } else {
@@ -4872,7 +4872,7 @@ bool AMDGPUAsmParser::validateSMEMOffset(const MCInst &Inst,
 
   Error(getSMEMOffsetLoc(Operands),
         isGFX12Plus() && IsBuffer
-            ? "expected a 23-bit non-negative offset for S_BUFFER ops"
+            ? "expected a 23-bit unsigned offset for buffer ops"
         : isGFX12Plus()        ? "expected a 24-bit signed offset"
         : (isVI() || IsBuffer) ? "expected a 20-bit unsigned offset"
                                : "expected a 21-bit signed offset");

llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp

@@ -843,7 +843,7 @@ DecodeStatus AMDGPUDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
     }
   }
 
-  // Validate buffer instruction offsets for GFX12+ - must be non-negative
+  // Validate buffer instruction offsets for GFX12+ - must not be a negative.
   if (isGFX12Plus() && isBufferInstruction(MI)) {
     int OffsetIdx =
         AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::offset);