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Commit 87641f5

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fix formatting, add test
1 parent 3d6a32b commit 87641f5

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+53
-3
lines changed

2 files changed

+53
-3
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llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -9673,8 +9673,8 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
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SextVal = SignExtend32(SplatBits, SplatBitSize);
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} else if (SplatBitSize == 64) {
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int64_t Splat64Val = APSplatBits.getSExtValue();
9676-
SplatBits = (uint64_t) Splat64Val;
9677-
SextVal = (int32_t) SplatBits;
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SplatBits = (uint64_t)Splat64Val;
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SextVal = (int32_t)SplatBits;
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bool P9Vector = Subtarget.hasP9Vector();
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int32_t Hi = P9Vector ? 127 : 15;
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int32_t Lo = P9Vector ? -128 : -16;
@@ -9814,7 +9814,7 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
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// Two instruction sequences.
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if (Subtarget.hasP9Vector() && SextVal >= -128 && SextVal <= 127) {
9817-
SDValue C = DAG.getConstant((unsigned char) SextVal, dl, MVT::i32);
9817+
SDValue C = DAG.getConstant((unsigned char)SextVal, dl, MVT::i32);
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SmallVector<SDValue, 16> Ops(16, C);
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SDValue BV = DAG.getBuildVector(MVT::v16i8, dl, Ops);
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assert((SplatSize == 2 || SplatSize == 4 || SplatSize == 8) &&
Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,50 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-aix-xcoff \
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; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc-aix-xcoff \
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; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s
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define dso_local noundef <8 x i16> @v103s() local_unnamed_addr #0 {
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; CHECK-LABEL: v103s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltib v2, 103
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; CHECK-NEXT: vupklsb v2, v2
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; CHECK-NEXT: blr
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entry:
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ret <8 x i16> splat (i16 103)
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}
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define dso_local noundef <2 x i64> @v103l() local_unnamed_addr #0 {
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; CHECK-LABEL: v103l:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltib v2, 103
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; CHECK-NEXT: vextsb2d v2, v2
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; CHECK-NEXT: blr
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entry:
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ret <2 x i64> splat (i64 103)
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}
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define dso_local noundef <4 x i32> @v103i() local_unnamed_addr #0 {
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; CHECK-LABEL: v103i:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltib v2, 103
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; CHECK-NEXT: vextsb2w v2, v2
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; CHECK-NEXT: blr
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entry:
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ret <4 x i32> splat (i32 103)
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}
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define dso_local noundef <2 x i64> @v11l() local_unnamed_addr #0 {
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; CHECK-LABEL: v11l:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vspltisw v2, -11
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; CHECK-NEXT: vupklsw v2, v2
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; CHECK-NEXT: blr
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entry:
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ret <2 x i64> splat (i64 -11)
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}

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