refine commits

Author: abhilash1910

llvm/docs/NVPTXUsage.rst

@@ -575,7 +575,7 @@ prefetched in terms of bytes and it must be a multiple of 16.
 
 * The last argument to these intrinsics is boolean flag indicating
   support for cache_hint. These flag argument must be compile-time
-  constant. When set, indicates a valid cache_hint (``i64 %ch``) 
+  constant. When set, it indicates a valid cache_hint (``i64 %ch``)
   and generates the ``.L2::cache_hint`` variant of the PTX instruction.
 
 For more information, refer PTX ISA

llvm/lib/Target/NVPTX/NVPTXIntrinsics.td

@@ -554,13 +554,11 @@ multiclass CP_ASYNC_BULK_PREFETCH_INTR {
   defvar prefetch = "cp.async.bulk.prefetch.L2.global";
   def NAME: NVPTXInst<(outs),
             (ins Int64Regs:$src, Int32Regs:$size),
-            !strconcat(prefetch," [$src], $size;"),
-            []>,
+            !strconcat(prefetch, " [$src], $size;"), []>,
             Requires<[hasPTX<80>, hasSM<90>]>;
   def NAME # _CH: NVPTXInst<(outs),
                   (ins Int64Regs:$src, Int32Regs:$size, Int64Regs:$ch),
-                  !strconcat(prefetch,".L2::cache_hint [$src], $size, $ch;"),
-                  []>,
+                  !strconcat(prefetch, ".L2::cache_hint [$src], $size, $ch;"), []>,
                   Requires<[hasPTX<80>, hasSM<90>]>;
 }