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| 1 | +; RUN: opt -passes='print<ir2vec>' -ir2vec-kind=flow-aware -o /dev/null -ir2vec-vocab-path=%S/Inputs/dummy_3D_nonzero_opc_vocab.json %s 2>&1 | FileCheck %s -check-prefix=3D-CHECK-OPC |
| 2 | +; RUN: opt -passes='print<ir2vec>' -ir2vec-kind=flow-aware -o /dev/null -ir2vec-vocab-path=%S/Inputs/dummy_3D_nonzero_type_vocab.json %s 2>&1 | FileCheck %s -check-prefix=3D-CHECK-TYPE |
| 3 | +; RUN: opt -passes='print<ir2vec>' -ir2vec-kind=flow-aware -o /dev/null -ir2vec-vocab-path=%S/Inputs/dummy_3D_nonzero_arg_vocab.json %s 2>&1 | FileCheck %s -check-prefix=3D-CHECK-ARG |
| 4 | + |
| 5 | +define dso_local noundef float @_Z3abcif(i32 noundef %a, float noundef %b) #0 { |
| 6 | +entry: |
| 7 | + %a.addr = alloca i32, align 4 |
| 8 | + %b.addr = alloca float, align 4 |
| 9 | + store i32 %a, ptr %a.addr, align 4 |
| 10 | + store float %b, ptr %b.addr, align 4 |
| 11 | + %0 = load i32, ptr %a.addr, align 4 |
| 12 | + %1 = load i32, ptr %a.addr, align 4 |
| 13 | + %mul = mul nsw i32 %0, %1 |
| 14 | + %conv = sitofp i32 %mul to float |
| 15 | + %2 = load float, ptr %b.addr, align 4 |
| 16 | + %add = fadd float %conv, %2 |
| 17 | + ret float %add |
| 18 | +} |
| 19 | + |
| 20 | +; 3D-CHECK-OPC: IR2Vec embeddings for function _Z3abcif: |
| 21 | +; 3D-CHECK-OPC-NEXT: Function vector: [ 3630.00 3672.00 3714.00 ] |
| 22 | +; 3D-CHECK-OPC-NEXT: Basic block vectors: |
| 23 | +; 3D-CHECK-OPC-NEXT: Basic block: entry: |
| 24 | +; 3D-CHECK-OPC-NEXT: [ 3630.00 3672.00 3714.00 ] |
| 25 | +; 3D-CHECK-OPC-NEXT: Instruction vectors: |
| 26 | +; 3D-CHECK-OPC-NEXT: Instruction: %a.addr = alloca i32, align 4 [ 91.00 92.00 93.00 ] |
| 27 | +; 3D-CHECK-OPC-NEXT: Instruction: %b.addr = alloca float, align 4 [ 91.00 92.00 93.00 ] |
| 28 | +; 3D-CHECK-OPC-NEXT: Instruction: store i32 %a, ptr %a.addr, align 4 [ 188.00 190.00 192.00 ] |
| 29 | +; 3D-CHECK-OPC-NEXT: Instruction: store float %b, ptr %b.addr, align 4 [ 188.00 190.00 192.00 ] |
| 30 | +; 3D-CHECK-OPC-NEXT: Instruction: %0 = load i32, ptr %a.addr, align 4 [ 185.00 187.00 189.00 ] |
| 31 | +; 3D-CHECK-OPC-NEXT: Instruction: %1 = load i32, ptr %a.addr, align 4 [ 185.00 187.00 189.00 ] |
| 32 | +; 3D-CHECK-OPC-NEXT: Instruction: %mul = mul nsw i32 %0, %1 [ 419.00 424.00 429.00 ] |
| 33 | +; 3D-CHECK-OPC-NEXT: Instruction: %conv = sitofp i32 %mul to float [ 549.00 555.00 561.00 ] |
| 34 | +; 3D-CHECK-OPC-NEXT: Instruction: %2 = load float, ptr %b.addr, align 4 [ 185.00 187.00 189.00 ] |
| 35 | +; 3D-CHECK-OPC-NEXT: Instruction: %add = fadd float %conv, %2 [ 774.00 783.00 792.00 ] |
| 36 | +; 3D-CHECK-OPC-NEXT: Instruction: ret float %add [ 775.00 785.00 795.00 ] |
| 37 | + |
| 38 | +; 3D-CHECK-TYPE: IR2Vec embeddings for function _Z3abcif: |
| 39 | +; 3D-CHECK-TYPE-NEXT: Function vector: [ 355.50 376.50 397.50 ] |
| 40 | +; 3D-CHECK-TYPE-NEXT: Basic block vectors: |
| 41 | +; 3D-CHECK-TYPE-NEXT: Basic block: entry: |
| 42 | +; 3D-CHECK-TYPE-NEXT: [ 355.50 376.50 397.50 ] |
| 43 | +; 3D-CHECK-TYPE-NEXT: Instruction vectors: |
| 44 | +; 3D-CHECK-TYPE-NEXT: Instruction: %a.addr = alloca i32, align 4 [ 12.50 13.00 13.50 ] |
| 45 | +; 3D-CHECK-TYPE-NEXT: Instruction: %b.addr = alloca float, align 4 [ 12.50 13.00 13.50 ] |
| 46 | +; 3D-CHECK-TYPE-NEXT: Instruction: store i32 %a, ptr %a.addr, align 4 [ 14.50 15.50 16.50 ] |
| 47 | +; 3D-CHECK-TYPE-NEXT: Instruction: store float %b, ptr %b.addr, align 4 [ 14.50 15.50 16.50 ] |
| 48 | +; 3D-CHECK-TYPE-NEXT: Instruction: %0 = load i32, ptr %a.addr, align 4 [ 22.00 23.00 24.00 ] |
| 49 | +; 3D-CHECK-TYPE-NEXT: Instruction: %1 = load i32, ptr %a.addr, align 4 [ 22.00 23.00 24.00 ] |
| 50 | +; 3D-CHECK-TYPE-NEXT: Instruction: %mul = mul nsw i32 %0, %1 [ 53.50 56.00 58.50 ] |
| 51 | +; 3D-CHECK-TYPE-NEXT: Instruction: %conv = sitofp i32 %mul to float [ 54.00 57.00 60.00 ] |
| 52 | +; 3D-CHECK-TYPE-NEXT: Instruction: %2 = load float, ptr %b.addr, align 4 [ 13.00 14.00 15.00 ] |
| 53 | +; 3D-CHECK-TYPE-NEXT: Instruction: %add = fadd float %conv, %2 [ 67.50 72.00 76.50 ] |
| 54 | +; 3D-CHECK-TYPE-NEXT: Instruction: ret float %add [ 69.50 74.50 79.50 ] |
| 55 | + |
| 56 | +; 3D-CHECK-ARG: IR2Vec embeddings for function _Z3abcif: |
| 57 | +; 3D-CHECK-ARG-NEXT: Function vector: [ 27.80 31.60 35.40 ] |
| 58 | +; 3D-CHECK-ARG-NEXT: Basic block vectors: |
| 59 | +; 3D-CHECK-ARG-NEXT: Basic block: entry: |
| 60 | +; 3D-CHECK-ARG-NEXT: [ 27.80 31.60 35.40 ] |
| 61 | +; 3D-CHECK-ARG-NEXT: Instruction vectors: |
| 62 | +; 3D-CHECK-ARG-NEXT: Instruction: %a.addr = alloca i32, align 4 [ 1.40 1.60 1.80 ] |
| 63 | +; 3D-CHECK-ARG-NEXT: Instruction: %b.addr = alloca float, align 4 [ 1.40 1.60 1.80 ] |
| 64 | +; 3D-CHECK-ARG-NEXT: Instruction: store i32 %a, ptr %a.addr, align 4 [ 3.40 3.80 4.20 ] |
| 65 | +; 3D-CHECK-ARG-NEXT: Instruction: store float %b, ptr %b.addr, align 4 [ 3.40 3.80 4.20 ] |
| 66 | +; 3D-CHECK-ARG-NEXT: Instruction: %0 = load i32, ptr %a.addr, align 4 [ 1.40 1.60 1.80 ] |
| 67 | +; 3D-CHECK-ARG-NEXT: Instruction: %1 = load i32, ptr %a.addr, align 4 [ 1.40 1.60 1.80 ] |
| 68 | +; 3D-CHECK-ARG-NEXT: Instruction: %mul = mul nsw i32 %0, %1 [ 2.80 3.20 3.60 ] |
| 69 | +; 3D-CHECK-ARG-NEXT: Instruction: %conv = sitofp i32 %mul to float [ 2.80 3.20 3.60 ] |
| 70 | +; 3D-CHECK-ARG-NEXT: Instruction: %2 = load float, ptr %b.addr, align 4 [ 1.40 1.60 1.80 ] |
| 71 | +; 3D-CHECK-ARG-NEXT: Instruction: %add = fadd float %conv, %2 [ 4.20 4.80 5.40 ] |
| 72 | +; 3D-CHECK-ARG-NEXT: Instruction: ret float %add [ 4.20 4.80 5.40 ] |
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