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simplify the loop on Extend users + avoid undef use in tests
1 parent 039e713 commit 87d224f

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2 files changed

+13
-16
lines changed

2 files changed

+13
-16
lines changed

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -18609,10 +18609,7 @@ static SDValue performBuildShuffleExtendCombine(SDValue BV, SelectionDAG &DAG) {
1860918609
if (ExtendType.isVector() && !ExtendType.isScalableVT()) {
1861018610
const int NumElements = ExtendType.getVectorNumElements();
1861118611
SmallBitVector UsedElements(NumElements, false);
18612-
for (auto UI = Extend.getNode()->use_begin(),
18613-
UE = Extend.getNode()->use_end();
18614-
UI != UE; ++UI) {
18615-
SDNode *User = UI->getUser();
18612+
for (SDNode *User : Extend.getNode()->users()) {
1861618613
if (User->getOpcode() == ISD::VECTOR_SHUFFLE &&
1861718614
User->getOperand(0) == Extend) {
1861818615
ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(User)->getMask();

llvm/test/CodeGen/AArch64/aarch64-ext-shuffle.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -32,16 +32,16 @@ define <4 x i32> @ext_shuffle_v4i16_v4i32(<4 x i16> %l, <4 x i32> %a, <4 x i32>
3232
; CHECK-GI-NEXT: sub v0.4s, v0.4s, v1.4s
3333
; CHECK-GI-NEXT: ret
3434
%lanes = sext <4 x i16> %l to <4 x i32>
35-
%shf0 = shufflevector <4 x i32> %lanes, <4 x i32> undef, <4 x i32> zeroinitializer
35+
%shf0 = shufflevector <4 x i32> %lanes, <4 x i32> poison, <4 x i32> zeroinitializer
3636
%mul0 = mul <4 x i32> %shf0, %a
3737
%add0 = add <4 x i32> %mul0, %b
38-
%shf1 = shufflevector <4 x i32> %lanes, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
38+
%shf1 = shufflevector <4 x i32> %lanes, <4 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
3939
%mul1 = mul <4 x i32> %shf1, %a
4040
%add1 = add <4 x i32> %mul1, %b
41-
%shf2 = shufflevector <4 x i32> %lanes, <4 x i32> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
41+
%shf2 = shufflevector <4 x i32> %lanes, <4 x i32> poison, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
4242
%mul2 = mul <4 x i32> %shf2, %a
4343
%add2 = add <4 x i32> %mul2, %b
44-
%shf3 = shufflevector <4 x i32> %lanes, <4 x i32> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
44+
%shf3 = shufflevector <4 x i32> %lanes, <4 x i32> poison, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
4545
%mul3 = mul <4 x i32> %shf3, %a
4646
%add3 = add <4 x i32> %mul3, %b
4747
%sub1 = sub <4 x i32> %add0, %add1
@@ -81,13 +81,13 @@ define <4 x i32> @ext_shuffle_v4i16_v4i32_partial(<4 x i16> %l, <4 x i32> %a, <4
8181
; CHECK-GI-NEXT: sub v0.4s, v0.4s, v2.4s
8282
; CHECK-GI-NEXT: ret
8383
%lanes = sext <4 x i16> %l to <4 x i32>
84-
%shf0 = shufflevector <4 x i32> %lanes, <4 x i32> undef, <4 x i32> zeroinitializer
84+
%shf0 = shufflevector <4 x i32> %lanes, <4 x i32> poison, <4 x i32> zeroinitializer
8585
%mul0 = mul <4 x i32> %shf0, %a
8686
%add0 = add <4 x i32> %mul0, %b
87-
%shf1 = shufflevector <4 x i32> %lanes, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
87+
%shf1 = shufflevector <4 x i32> %lanes, <4 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
8888
%mul1 = mul <4 x i32> %shf1, %a
8989
%add1 = add <4 x i32> %mul1, %b
90-
%shf2 = shufflevector <4 x i32> %lanes, <4 x i32> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
90+
%shf2 = shufflevector <4 x i32> %lanes, <4 x i32> poison, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
9191
%mul2 = mul <4 x i32> %shf2, %a
9292
%add2 = add <4 x i32> %mul2, %b
9393
%sub1 = sub <4 x i32> %add0, %add1
@@ -128,13 +128,13 @@ define <4 x i32> @ext_shuffle_v4i16_v4i32_add(<4 x i16> %l, <4 x i32> %a, <4 x i
128128
; CHECK-GI-NEXT: sub v0.4s, v1.4s, v0.4s
129129
; CHECK-GI-NEXT: ret
130130
%lanes = sext <4 x i16> %l to <4 x i32>
131-
%shf0 = shufflevector <4 x i32> %lanes, <4 x i32> undef, <4 x i32> zeroinitializer
131+
%shf0 = shufflevector <4 x i32> %lanes, <4 x i32> poison, <4 x i32> zeroinitializer
132132
%add0 = add <4 x i32> %shf0, %b
133-
%shf1 = shufflevector <4 x i32> %lanes, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
133+
%shf1 = shufflevector <4 x i32> %lanes, <4 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
134134
%add1 = add <4 x i32> %shf1, %b
135-
%shf2 = shufflevector <4 x i32> %lanes, <4 x i32> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
135+
%shf2 = shufflevector <4 x i32> %lanes, <4 x i32> poison, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
136136
%add2 = add <4 x i32> %shf2, %b
137-
%shf3 = shufflevector <4 x i32> %lanes, <4 x i32> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
137+
%shf3 = shufflevector <4 x i32> %lanes, <4 x i32> poison, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
138138
%add3 = add <4 x i32> %shf3, %b
139139
%sub1 = sub <4 x i32> %add0, %add1
140140
%sub2 = sub <4 x i32> %add2, %add3
@@ -159,7 +159,7 @@ define <4 x i32> @ext_shuffle_v4i16_v4i32_one(<4 x i16> %l, <4 x i32> %a, <4 x i
159159
; CHECK-GI-NEXT: mla v0.4s, v1.4s, v3.s[3]
160160
; CHECK-GI-NEXT: ret
161161
%lanes = sext <4 x i16> %l to <4 x i32>
162-
%shf3 = shufflevector <4 x i32> %lanes, <4 x i32> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
162+
%shf3 = shufflevector <4 x i32> %lanes, <4 x i32> poison, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
163163
%mul3 = mul <4 x i32> %shf3, %a
164164
%add3 = add <4 x i32> %mul3, %b
165165
ret <4 x i32> %add3

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