adding support on analysis printer

Author: joaosaffran

llvm/lib/Target/DirectX/DXILRootSignature.cpp

@@ -558,14 +558,12 @@ PreservedAnalyses RootSignatureAnalysisPrinter::run(Module &M,
     OS << "Definition for '" << F.getName() << "':\n";
 
     // start root signature header
-    Space++;
     OS << indent(Space) << "Flags: " << format_hex(RS.Flags, 8) << "\n";
     OS << indent(Space) << "Version: " << RS.Version << "\n";
     OS << indent(Space) << "RootParametersOffset: " << RS.RootParameterOffset
        << "\n";
     OS << indent(Space) << "NumParameters: " << RS.ParametersContainer.size()
        << "\n";
-    Space++;
     for (size_t I = 0; I < RS.ParametersContainer.size(); I++) {
       const auto &[Type, Loc] =
           RS.ParametersContainer.getTypeAndLocForParameter(I);
@@ -588,7 +586,7 @@ PreservedAnalyses RootSignatureAnalysisPrinter::run(Module &M,
            << "Num 32 Bit Values: " << Constants.Num32BitValues << "\n";
         break;
       }
-            case llvm::to_underlying(dxbc::RootParameterType::CBV):
+      case llvm::to_underlying(dxbc::RootParameterType::CBV):
       case llvm::to_underlying(dxbc::RootParameterType::UAV):
       case llvm::to_underlying(dxbc::RootParameterType::SRV): {
                 const dxbc::RTS0::v2::RootDescriptor &Descriptor =
@@ -601,8 +599,29 @@ PreservedAnalyses RootSignatureAnalysisPrinter::run(Module &M,
         OS << indent(Space + 2) << "Flags: " << Descriptor.Flags << "\n";
         break;
       }
+      case llvm::to_underlying(dxbc::RootParameterType::DescriptorTable): {
+        const mcdxbc::DescriptorTable &Table =
+            RS.ParametersContainer.getDescriptorTable(Loc);
+        OS << indent(Space+ 2) << "NumRanges: " << Table.Ranges.size() << "\n";  
+
+        for(const dxbc::RTS0::v2::DescriptorRange Range : Table){
+        OS << indent(Space + 2) << "- Range Type: " << Range.RangeType
+           << "\n";        
+        OS << indent(Space + 4) << "Register Space: " << Range.RegisterSpace
+           << "\n";
+        OS << indent(Space + 4) << "Base Shader Register: " << Range.BaseShaderRegister
+           << "\n";
+        OS << indent(Space + 4) << "Num Descriptors: " << Range.NumDescriptors
+           << "\n";  
+        OS << indent(Space + 4) << "Offset In Descriptors From Table Start: " << Range.OffsetInDescriptorsFromTableStart
+           << "\n";  
+        if(RS.Version > 1)
+          OS << indent(Space + 4) << "Flags: " << Range.Flags
+            << "\n";                         
+        }
+        break;
+      }
       }
-      Space--;
     }
     OS << indent(Space) << "NumStaticSamplers: " << 0 << "\n";
     OS << indent(Space) << "StaticSamplersOffset: " << RS.StaticSamplersOffset

llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Parameters.ll

@@ -12,16 +12,19 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
 
 !dx.rootsignatures = !{!2} ; list of function/root signature pairs
 !2 = !{ ptr @main, !3 } ; function, root signature
-!3 = !{ !4, !5, !6 } ; list of root signature elements
+!3 = !{ !4, !5, !6, !7 } ; list of root signature elements
 !4 = !{ !"RootFlags", i32 1 } ; 1 = allow_input_assembler_input_layout
 !5 = !{ !"RootConstants", i32 0, i32 1, i32 2, i32 3 }
 !6 = !{ !"RootSRV", i32 1, i32 4, i32 5, i32 6 }
+!7 = !{ !"DescriptorTable", i32 0, !8, !9 }
+!8 = !{ !"SRV", i32 0, i32 0, i32 -1, i32 -1, i32 4 }
+!9 = !{ !"UAV", i32 5, i32 1, i32 10, i32 5, i32 2 }
 
 ;CHECK-LABEL: Definition for 'main':
 ;CHECK-NEXT:  Flags: 0x000001
 ;CHECK-NEXT:  Version: 2
 ;CHECK-NEXT:  RootParametersOffset: 24
-;CHECK-NEXT:  NumParameters: 2
+;CHECK-NEXT:  NumParameters: 3
 ;CHECK-NEXT:   - Parameter Type: 1
 ;CHECK-NEXT:     Shader Visibility: 0
 ;CHECK-NEXT:     Register Space: 2
@@ -32,5 +35,20 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
 ;CHECK-NEXT:     Register Space: 5
 ;CHECK-NEXT:     Shader Register: 4
 ;CHECK-NEXT:     Flags: 6
+;CHECK-NEXT:   - Parameter Type: 0
+;CHECK-NEXT:     Shader Visibility: 0
+;CHECK-NEXT:     NumRanges: 2
+;CHECK-NEXT:     - Range Type: 0
+;CHECK-NEXT:       Register Space: 4294967295
+;CHECK-NEXT:       Base Shader Register: 0
+;CHECK-NEXT:       Num Descriptors: 0
+;CHECK-NEXT:       Offset In Descriptors From Table Start: 4294967295
+;CHECK-NEXT:       Flags: 4
+;CHECK-NEXT:     - Range Type: 1
+;CHECK-NEXT:       Register Space: 10
+;CHECK-NEXT:       Base Shader Register: 1
+;CHECK-NEXT:       Num Descriptors: 5
+;CHECK-NEXT:       Offset In Descriptors From Table Start: 5
+;CHECK-NEXT:       Flags: 2
 ;CHECK-NEXT:  NumStaticSamplers: 0
 ;CHECK-NEXT:  StaticSamplersOffset: 0