Skip to content

Commit 8983c90

Browse files
jthackrayjthackray
committed
fixup! [AArch64][llvm] Add support for new vcvt* intrinsics
Double or halve element width in arm_neon.td, to ensure no conversion is done when calling intrinsic.
1 parent d2f2b17 commit 8983c90

File tree

2 files changed

+60
-80
lines changed

2 files changed

+60
-80
lines changed

‎clang/include/clang/Basic/arm_neon.td‎

Lines changed: 20 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1469,46 +1469,46 @@ def SCALAR_FCVTXN : IInst<"vcvtx_f32", "(1F<)(1!)", "Sd">;
14691469

14701470
def SCALAR_FCVTN_F32toSS : SInst<"vcvtn_s32", "(1S)1", "Sf">;
14711471
def SCALAR_FCVTN_F32toUS : SInst<"vcvtn_u32", "(1U)1", "Sf">;
1472-
def SCALAR_FCVTN_F64toSS : SInst<"vcvtn_s32", "(1S)1", "Sd">;
1473-
def SCALAR_FCVTN_F64toUS : SInst<"vcvtn_u32", "(1U)1", "Sd">;
1474-
def SCALAR_FCVTN_F32toSD : SInst<"vcvtn_s64", "(1S)1", "Sf">;
1475-
def SCALAR_FCVTN_F32toUD : SInst<"vcvtn_u64", "(1U)1", "Sf">;
1472+
def SCALAR_FCVTN_F64toSS : SInst<"vcvtn_s32", "(1S<)1", "Sd">;
1473+
def SCALAR_FCVTN_F64toUS : SInst<"vcvtn_u32", "(1U<)1", "Sd">;
1474+
def SCALAR_FCVTN_F32toSD : SInst<"vcvtn_s64", "(1S>)1", "Sf">;
1475+
def SCALAR_FCVTN_F32toUD : SInst<"vcvtn_u64", "(1U>)1", "Sf">;
14761476
def SCALAR_FCVTN_F64toSD : SInst<"vcvtn_s64", "(1S)1", "Sd">;
14771477
def SCALAR_FCVTN_F64toUD : SInst<"vcvtn_u64", "(1U)1", "Sd">;
14781478

14791479
def SCALAR_FCVTM_F32toSS : SInst<"vcvtm_s32", "(1S)1", "Sf">;
14801480
def SCALAR_FCVTM_F32toUS : SInst<"vcvtm_u32", "(1U)1", "Sf">;
1481-
def SCALAR_FCVTM_F64toSS : SInst<"vcvtm_s32", "(1S)1", "Sd">;
1482-
def SCALAR_FCVTM_F64toUS : SInst<"vcvtm_u32", "(1U)1", "Sd">;
1483-
def SCALAR_FCVTM_F32toSD : SInst<"vcvtm_s64", "(1S)1", "Sf">;
1484-
def SCALAR_FCVTM_F32toUD : SInst<"vcvtm_u64", "(1U)1", "Sf">;
1481+
def SCALAR_FCVTM_F64toSS : SInst<"vcvtm_s32", "(1S<)1", "Sd">;
1482+
def SCALAR_FCVTM_F64toUS : SInst<"vcvtm_u32", "(1U<)1", "Sd">;
1483+
def SCALAR_FCVTM_F32toSD : SInst<"vcvtm_s64", "(1S>)1", "Sf">;
1484+
def SCALAR_FCVTM_F32toUD : SInst<"vcvtm_u64", "(1U>)1", "Sf">;
14851485
def SCALAR_FCVTM_F64toSD : SInst<"vcvtm_s64", "(1S)1", "Sd">;
14861486
def SCALAR_FCVTM_F64toUD : SInst<"vcvtm_u64", "(1U)1", "Sd">;
14871487

14881488
def SCALAR_FCVTA_F32toSS : SInst<"vcvta_s32", "(1S)1", "Sf">;
14891489
def SCALAR_FCVTA_F32toUS : SInst<"vcvta_u32", "(1U)1", "Sf">;
1490-
def SCALAR_FCVTA_F64toSS : SInst<"vcvta_s32", "(1S)1", "Sd">;
1491-
def SCALAR_FCVTA_F64toUS : SInst<"vcvta_u32", "(1U)1", "Sd">;
1492-
def SCALAR_FCVTA_F32toSD : SInst<"vcvta_s64", "(1S)1", "Sf">;
1493-
def SCALAR_FCVTA_F32toUD : SInst<"vcvta_u64", "(1U)1", "Sf">;
1490+
def SCALAR_FCVTA_F64toSS : SInst<"vcvta_s32", "(1S<)1", "Sd">;
1491+
def SCALAR_FCVTA_F64toUS : SInst<"vcvta_u32", "(1U<)1", "Sd">;
1492+
def SCALAR_FCVTA_F32toSD : SInst<"vcvta_s64", "(1S>)1", "Sf">;
1493+
def SCALAR_FCVTA_F32toUD : SInst<"vcvta_u64", "(1U>)1", "Sf">;
14941494
def SCALAR_FCVTA_F64toSD : SInst<"vcvta_s64", "(1S)1", "Sd">;
14951495
def SCALAR_FCVTA_F64toUD : SInst<"vcvta_u64", "(1U)1", "Sd">;
14961496

14971497
def SCALAR_FCVTP_F32toSS : SInst<"vcvtp_s32", "(1S)1", "Sf">;
14981498
def SCALAR_FCVTP_F32toUS : SInst<"vcvtp_u32", "(1U)1", "Sf">;
1499-
def SCALAR_FCVTP_F64toSS : SInst<"vcvtp_s32", "(1S)1", "Sd">;
1500-
def SCALAR_FCVTP_F64toUS : SInst<"vcvtp_u32", "(1U)1", "Sd">;
1501-
def SCALAR_FCVTP_F32toSD : SInst<"vcvtp_s64", "(1S)1", "Sf">;
1502-
def SCALAR_FCVTP_F32toUD : SInst<"vcvtp_u64", "(1U)1", "Sf">;
1499+
def SCALAR_FCVTP_F64toSS : SInst<"vcvtp_s32", "(1S<)1", "Sd">;
1500+
def SCALAR_FCVTP_F64toUS : SInst<"vcvtp_u32", "(1U<)1", "Sd">;
1501+
def SCALAR_FCVTP_F32toSD : SInst<"vcvtp_s64", "(1S>)1", "Sf">;
1502+
def SCALAR_FCVTP_F32toUD : SInst<"vcvtp_u64", "(1U>)1", "Sf">;
15031503
def SCALAR_FCVTP_F64toSD : SInst<"vcvtp_s64", "(1S)1", "Sd">;
15041504
def SCALAR_FCVTP_F64toUD : SInst<"vcvtp_u64", "(1U)1", "Sd">;
15051505

15061506
def SCALAR_FCVTZ_F32toSS : SInst<"vcvt_s32", "(1S)1", "Sf">;
15071507
def SCALAR_FCVTZ_F32toUS : SInst<"vcvt_u32", "(1U)1", "Sf">;
1508-
def SCALAR_FCVTZ_F64toSS : SInst<"vcvt_s32", "(1S)1", "Sd">;
1509-
def SCALAR_FCVTZ_F64toUS : SInst<"vcvt_u32", "(1U)1", "Sd">;
1510-
def SCALAR_FCVTZ_F32toSD : SInst<"vcvt_s64", "(1S)1", "Sf">;
1511-
def SCALAR_FCVTZ_F32toUD : SInst<"vcvt_u64", "(1U)1", "Sf">;
1508+
def SCALAR_FCVTZ_F64toSS : SInst<"vcvt_s32", "(1S<)1", "Sd">;
1509+
def SCALAR_FCVTZ_F64toUS : SInst<"vcvt_u32", "(1U<)1", "Sd">;
1510+
def SCALAR_FCVTZ_F32toSD : SInst<"vcvt_s64", "(1S>)1", "Sf">;
1511+
def SCALAR_FCVTZ_F32toUD : SInst<"vcvt_u64", "(1U>)1", "Sf">;
15121512
def SCALAR_FCVTZ_F64toSD : SInst<"vcvt_s64", "(1S)1", "Sd">;
15131513
def SCALAR_FCVTZ_F64toUD : SInst<"vcvt_u64", "(1U)1", "Sd">;
15141514

‎clang/test/CodeGen/AArch64/neon-fcvt-intrinsics.c‎

Lines changed: 40 additions & 60 deletions
Original file line numberDiff line numberDiff line change
@@ -39,9 +39,8 @@ int64_t test_vcvtad_s64_f64(float64_t a) {
3939
// CHECK-LABEL: define {{[^@]+}}@test_vcvtas_s64_f32
4040
// CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] {
4141
// CHECK-NEXT: entry:
42-
// CHECK-NEXT: [[VCVTAS_S64_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtas.i32.f32(float [[A]])
43-
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[VCVTAS_S64_F32_I]] to i64
44-
// CHECK-NEXT: ret i64 [[CONV]]
42+
// CHECK-NEXT: [[VCVTAS_S64_F32_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtas.i64.f32(float [[A]])
43+
// CHECK-NEXT: ret i64 [[VCVTAS_S64_F32_I]]
4544
//
4645
int64_t test_vcvtas_s64_f32(float32_t a) {
4746
return (int64_t)vcvtas_s64_f32(a);
@@ -50,9 +49,8 @@ int64_t test_vcvtas_s64_f32(float32_t a) {
5049
// CHECK-LABEL: define {{[^@]+}}@test_vcvtad_s32_f64
5150
// CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] {
5251
// CHECK-NEXT: entry:
53-
// CHECK-NEXT: [[VCVTAD_S32_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtas.i64.f64(double [[A]])
54-
// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[VCVTAD_S32_F64_I]] to i32
55-
// CHECK-NEXT: ret i32 [[CONV]]
52+
// CHECK-NEXT: [[VCVTAD_S32_F64_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtas.i32.f64(double [[A]])
53+
// CHECK-NEXT: ret i32 [[VCVTAD_S32_F64_I]]
5654
//
5755
int32_t test_vcvtad_s32_f64(float64_t a) {
5856
return (int32_t)vcvtad_s32_f64(a);
@@ -81,9 +79,8 @@ uint64_t test_vcvtad_u64_f64(float64_t a) {
8179
// CHECK-LABEL: define {{[^@]+}}@test_vcvtas_u64_f32
8280
// CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] {
8381
// CHECK-NEXT: entry:
84-
// CHECK-NEXT: [[VCVTAS_U64_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtau.i32.f32(float [[A]])
85-
// CHECK-NEXT: [[CONV:%.*]] = zext i32 [[VCVTAS_U64_F32_I]] to i64
86-
// CHECK-NEXT: ret i64 [[CONV]]
82+
// CHECK-NEXT: [[VCVTAS_U64_F32_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtau.i64.f32(float [[A]])
83+
// CHECK-NEXT: ret i64 [[VCVTAS_U64_F32_I]]
8784
//
8885
uint64_t test_vcvtas_u64_f32(float32_t a) {
8986
return (uint64_t)vcvtas_u64_f32(a);
@@ -92,9 +89,8 @@ uint64_t test_vcvtas_u64_f32(float32_t a) {
9289
// CHECK-LABEL: define {{[^@]+}}@test_vcvtad_u32_f64
9390
// CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] {
9491
// CHECK-NEXT: entry:
95-
// CHECK-NEXT: [[VCVTAD_U32_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtau.i64.f64(double [[A]])
96-
// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[VCVTAD_U32_F64_I]] to i32
97-
// CHECK-NEXT: ret i32 [[CONV]]
92+
// CHECK-NEXT: [[VCVTAD_U32_F64_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtau.i32.f64(double [[A]])
93+
// CHECK-NEXT: ret i32 [[VCVTAD_U32_F64_I]]
9894
//
9995
uint32_t test_vcvtad_u32_f64(float64_t a) {
10096
return (uint32_t)vcvtad_u32_f64(a);
@@ -123,9 +119,8 @@ int64_t test_vcvtmd_s64_f64(float64_t a) {
123119
// CHECK-LABEL: define {{[^@]+}}@test_vcvtms_s64_f32
124120
// CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] {
125121
// CHECK-NEXT: entry:
126-
// CHECK-NEXT: [[VCVTMS_S64_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtms.i32.f32(float [[A]])
127-
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[VCVTMS_S64_F32_I]] to i64
128-
// CHECK-NEXT: ret i64 [[CONV]]
122+
// CHECK-NEXT: [[VCVTMS_S64_F32_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtms.i64.f32(float [[A]])
123+
// CHECK-NEXT: ret i64 [[VCVTMS_S64_F32_I]]
129124
//
130125
int64_t test_vcvtms_s64_f32(float32_t a) {
131126
return (int64_t)vcvtms_s64_f32(a);
@@ -134,9 +129,8 @@ int64_t test_vcvtms_s64_f32(float32_t a) {
134129
// CHECK-LABEL: define {{[^@]+}}@test_vcvtmd_s32_f64
135130
// CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] {
136131
// CHECK-NEXT: entry:
137-
// CHECK-NEXT: [[VCVTMD_S32_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtms.i64.f64(double [[A]])
138-
// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[VCVTMD_S32_F64_I]] to i32
139-
// CHECK-NEXT: ret i32 [[CONV]]
132+
// CHECK-NEXT: [[VCVTMD_S32_F64_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtms.i32.f64(double [[A]])
133+
// CHECK-NEXT: ret i32 [[VCVTMD_S32_F64_I]]
140134
//
141135
int32_t test_vcvtmd_s32_f64(float64_t a) {
142136
return (int32_t)vcvtmd_s32_f64(a);
@@ -165,9 +159,8 @@ uint64_t test_vcvtmd_u64_f64(float64_t a) {
165159
// CHECK-LABEL: define {{[^@]+}}@test_vcvtms_u64_f32
166160
// CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] {
167161
// CHECK-NEXT: entry:
168-
// CHECK-NEXT: [[VCVTMS_U64_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float [[A]])
169-
// CHECK-NEXT: [[CONV:%.*]] = zext i32 [[VCVTMS_U64_F32_I]] to i64
170-
// CHECK-NEXT: ret i64 [[CONV]]
162+
// CHECK-NEXT: [[VCVTMS_U64_F32_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtmu.i64.f32(float [[A]])
163+
// CHECK-NEXT: ret i64 [[VCVTMS_U64_F32_I]]
171164
//
172165
uint64_t test_vcvtms_u64_f32(float32_t a) {
173166
return (uint64_t)vcvtms_u64_f32(a);
@@ -176,9 +169,8 @@ uint64_t test_vcvtms_u64_f32(float32_t a) {
176169
// CHECK-LABEL: define {{[^@]+}}@test_vcvtmd_u32_f64
177170
// CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] {
178171
// CHECK-NEXT: entry:
179-
// CHECK-NEXT: [[VCVTMD_U32_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double [[A]])
180-
// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[VCVTMD_U32_F64_I]] to i32
181-
// CHECK-NEXT: ret i32 [[CONV]]
172+
// CHECK-NEXT: [[VCVTMD_U32_F64_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtmu.i32.f64(double [[A]])
173+
// CHECK-NEXT: ret i32 [[VCVTMD_U32_F64_I]]
182174
//
183175
uint32_t test_vcvtmd_u32_f64(float64_t a) {
184176
return (uint32_t)vcvtmd_u32_f64(a);
@@ -207,9 +199,8 @@ int64_t test_vcvtnd_s64_f64(float64_t a) {
207199
// CHECK-LABEL: define {{[^@]+}}@test_vcvtns_s64_f32
208200
// CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] {
209201
// CHECK-NEXT: entry:
210-
// CHECK-NEXT: [[VCVTNS_S64_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtns.i32.f32(float [[A]])
211-
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[VCVTNS_S64_F32_I]] to i64
212-
// CHECK-NEXT: ret i64 [[CONV]]
202+
// CHECK-NEXT: [[VCVTNS_S64_F32_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtns.i64.f32(float [[A]])
203+
// CHECK-NEXT: ret i64 [[VCVTNS_S64_F32_I]]
213204
//
214205
int64_t test_vcvtns_s64_f32(float32_t a) {
215206
return (int64_t)vcvtns_s64_f32(a);
@@ -218,9 +209,8 @@ int64_t test_vcvtns_s64_f32(float32_t a) {
218209
// CHECK-LABEL: define {{[^@]+}}@test_vcvtnd_s32_f64
219210
// CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] {
220211
// CHECK-NEXT: entry:
221-
// CHECK-NEXT: [[VCVTND_S32_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtns.i64.f64(double [[A]])
222-
// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[VCVTND_S32_F64_I]] to i32
223-
// CHECK-NEXT: ret i32 [[CONV]]
212+
// CHECK-NEXT: [[VCVTND_S32_F64_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtns.i32.f64(double [[A]])
213+
// CHECK-NEXT: ret i32 [[VCVTND_S32_F64_I]]
224214
//
225215
int32_t test_vcvtnd_s32_f64(float64_t a) {
226216
return (int32_t)vcvtnd_s32_f64(a);
@@ -249,9 +239,8 @@ uint64_t test_vcvtnd_u64_f64(float64_t a) {
249239
// CHECK-LABEL: define {{[^@]+}}@test_vcvtns_u64_f32
250240
// CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] {
251241
// CHECK-NEXT: entry:
252-
// CHECK-NEXT: [[VCVTNS_U64_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtnu.i32.f32(float [[A]])
253-
// CHECK-NEXT: [[CONV:%.*]] = zext i32 [[VCVTNS_U64_F32_I]] to i64
254-
// CHECK-NEXT: ret i64 [[CONV]]
242+
// CHECK-NEXT: [[VCVTNS_U64_F32_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtnu.i64.f32(float [[A]])
243+
// CHECK-NEXT: ret i64 [[VCVTNS_U64_F32_I]]
255244
//
256245
uint64_t test_vcvtns_u64_f32(float32_t a) {
257246
return (uint64_t)vcvtns_u64_f32(a);
@@ -260,9 +249,8 @@ uint64_t test_vcvtns_u64_f32(float32_t a) {
260249
// CHECK-LABEL: define {{[^@]+}}@test_vcvtnd_u32_f64
261250
// CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] {
262251
// CHECK-NEXT: entry:
263-
// CHECK-NEXT: [[VCVTND_U32_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtnu.i64.f64(double [[A]])
264-
// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[VCVTND_U32_F64_I]] to i32
265-
// CHECK-NEXT: ret i32 [[CONV]]
252+
// CHECK-NEXT: [[VCVTND_U32_F64_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtnu.i32.f64(double [[A]])
253+
// CHECK-NEXT: ret i32 [[VCVTND_U32_F64_I]]
266254
//
267255
uint32_t test_vcvtnd_u32_f64(float64_t a) {
268256
return (uint32_t)vcvtnd_u32_f64(a);
@@ -291,9 +279,8 @@ int64_t test_vcvtpd_s64_f64(float64_t a) {
291279
// CHECK-LABEL: define {{[^@]+}}@test_vcvtps_s64_f32
292280
// CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] {
293281
// CHECK-NEXT: entry:
294-
// CHECK-NEXT: [[VCVTPS_S64_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtps.i32.f32(float [[A]])
295-
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[VCVTPS_S64_F32_I]] to i64
296-
// CHECK-NEXT: ret i64 [[CONV]]
282+
// CHECK-NEXT: [[VCVTPS_S64_F32_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtps.i64.f32(float [[A]])
283+
// CHECK-NEXT: ret i64 [[VCVTPS_S64_F32_I]]
297284
//
298285
int64_t test_vcvtps_s64_f32(float32_t a) {
299286
return (int64_t)vcvtps_s64_f32(a);
@@ -302,9 +289,8 @@ int64_t test_vcvtps_s64_f32(float32_t a) {
302289
// CHECK-LABEL: define {{[^@]+}}@test_vcvtpd_s32_f64
303290
// CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] {
304291
// CHECK-NEXT: entry:
305-
// CHECK-NEXT: [[VCVTPD_S32_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtps.i64.f64(double [[A]])
306-
// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[VCVTPD_S32_F64_I]] to i32
307-
// CHECK-NEXT: ret i32 [[CONV]]
292+
// CHECK-NEXT: [[VCVTPD_S32_F64_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtps.i32.f64(double [[A]])
293+
// CHECK-NEXT: ret i32 [[VCVTPD_S32_F64_I]]
308294
//
309295
int32_t test_vcvtpd_s32_f64(float64_t a) {
310296
return (int32_t)vcvtpd_s32_f64(a);
@@ -333,9 +319,8 @@ uint64_t test_vcvtpd_u64_f64(float64_t a) {
333319
// CHECK-LABEL: define {{[^@]+}}@test_vcvtps_u64_f32
334320
// CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] {
335321
// CHECK-NEXT: entry:
336-
// CHECK-NEXT: [[VCVTPS_U64_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float [[A]])
337-
// CHECK-NEXT: [[CONV:%.*]] = zext i32 [[VCVTPS_U64_F32_I]] to i64
338-
// CHECK-NEXT: ret i64 [[CONV]]
322+
// CHECK-NEXT: [[VCVTPS_U64_F32_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtpu.i64.f32(float [[A]])
323+
// CHECK-NEXT: ret i64 [[VCVTPS_U64_F32_I]]
339324
//
340325
uint64_t test_vcvtps_u64_f32(float32_t a) {
341326
return (uint64_t)vcvtps_u64_f32(a);
@@ -344,9 +329,8 @@ uint64_t test_vcvtps_u64_f32(float32_t a) {
344329
// CHECK-LABEL: define {{[^@]+}}@test_vcvtpd_u32_f64
345330
// CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] {
346331
// CHECK-NEXT: entry:
347-
// CHECK-NEXT: [[VCVTPD_U32_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double [[A]])
348-
// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[VCVTPD_U32_F64_I]] to i32
349-
// CHECK-NEXT: ret i32 [[CONV]]
332+
// CHECK-NEXT: [[VCVTPD_U32_F64_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtpu.i32.f64(double [[A]])
333+
// CHECK-NEXT: ret i32 [[VCVTPD_U32_F64_I]]
350334
//
351335
uint32_t test_vcvtpd_u32_f64(float64_t a) {
352336
return (uint32_t)vcvtpd_u32_f64(a);
@@ -375,9 +359,8 @@ int64_t test_vcvtd_s64_f64(float64_t a) {
375359
// CHECK-LABEL: define {{[^@]+}}@test_vcvts_s64_f32
376360
// CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] {
377361
// CHECK-NEXT: entry:
378-
// CHECK-NEXT: [[VCVTS_S64_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtzs.i32.f32(float [[A]])
379-
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[VCVTS_S64_F32_I]] to i64
380-
// CHECK-NEXT: ret i64 [[CONV]]
362+
// CHECK-NEXT: [[VCVTS_S64_F32_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtzs.i64.f32(float [[A]])
363+
// CHECK-NEXT: ret i64 [[VCVTS_S64_F32_I]]
381364
//
382365
int64_t test_vcvts_s64_f32(float32_t a) {
383366
return (int64_t)vcvts_s64_f32(a);
@@ -386,9 +369,8 @@ int64_t test_vcvts_s64_f32(float32_t a) {
386369
// CHECK-LABEL: define {{[^@]+}}@test_vcvtd_s32_f64
387370
// CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] {
388371
// CHECK-NEXT: entry:
389-
// CHECK-NEXT: [[VCVTD_S32_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtzs.i64.f64(double [[A]])
390-
// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[VCVTD_S32_F64_I]] to i32
391-
// CHECK-NEXT: ret i32 [[CONV]]
372+
// CHECK-NEXT: [[VCVTD_S32_F64_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtzs.i32.f64(double [[A]])
373+
// CHECK-NEXT: ret i32 [[VCVTD_S32_F64_I]]
392374
//
393375
int32_t test_vcvtd_s32_f64(float64_t a) {
394376
return (int32_t)vcvtd_s32_f64(a);
@@ -417,9 +399,8 @@ uint64_t test_vcvtd_u64_f64(float64_t a) {
417399
// CHECK-LABEL: define {{[^@]+}}@test_vcvts_u64_f32
418400
// CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] {
419401
// CHECK-NEXT: entry:
420-
// CHECK-NEXT: [[VCVTS_U64_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtzu.i32.f32(float [[A]])
421-
// CHECK-NEXT: [[CONV:%.*]] = zext i32 [[VCVTS_U64_F32_I]] to i64
422-
// CHECK-NEXT: ret i64 [[CONV]]
402+
// CHECK-NEXT: [[VCVTS_U64_F32_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtzu.i64.f32(float [[A]])
403+
// CHECK-NEXT: ret i64 [[VCVTS_U64_F32_I]]
423404
//
424405
uint64_t test_vcvts_u64_f32(float32_t a) {
425406
return (uint64_t)vcvts_u64_f32(a);
@@ -428,9 +409,8 @@ uint64_t test_vcvts_u64_f32(float32_t a) {
428409
// CHECK-LABEL: define {{[^@]+}}@test_vcvtd_u32_f64
429410
// CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] {
430411
// CHECK-NEXT: entry:
431-
// CHECK-NEXT: [[VCVTD_U32_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtzu.i64.f64(double [[A]])
432-
// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[VCVTD_U32_F64_I]] to i32
433-
// CHECK-NEXT: ret i32 [[CONV]]
412+
// CHECK-NEXT: [[VCVTD_U32_F64_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtzu.i32.f64(double [[A]])
413+
// CHECK-NEXT: ret i32 [[VCVTD_U32_F64_I]]
434414
//
435415
uint32_t test_vcvtd_u32_f64(float64_t a) {
436416
return (uint32_t)vcvtd_u32_f64(a);

0 commit comments

Comments
 (0)