RSan: https://doi.org/10.1145/3729277

Without value support

Author: rymrg

compiler-rt/lib/tsan/rtl/CMakeLists.txt

@@ -49,6 +49,9 @@ set(TSAN_SOURCES
   tsan_symbolize.cpp
   tsan_sync.cpp
   tsan_vector_clock.cpp
+  rsan.cpp
+  rsan_report.cpp
+  rsan_stacktrace.cpp
   )
 
 set(TSAN_CXX_SOURCES
@@ -59,6 +62,10 @@ set(TSAN_PREINIT_SOURCES
   tsan_preinit.cpp
   )
 
+set_source_files_properties(tsan_interface_atomic.cpp PROPERTIES COMPILE_FLAGS -std=c++20)
+set_source_files_properties(tsan_mman.cpp PROPERTIES COMPILE_FLAGS -std=c++20)
+set_source_files_properties(tsan_rtl_mutex.cpp PROPERTIES COMPILE_FLAGS -std=c++20)
+
 if(APPLE)
   list(APPEND TSAN_SOURCES
     tsan_interceptors_mac.cpp

compiler-rt/lib/tsan/rtl/rsan.cpp

@@ -0,0 +1,8 @@
+#include "rsan_vectorclock.hpp"
+#include "rsan_robustnessmodel.hpp"
+#include "rsan_instrument.hpp"
+#include "rsan_map.hpp"
+#include "rsan_arena.hpp"
+
+namespace Robustness{
+} // namespace Robustness

compiler-rt/lib/tsan/rtl/rsan_action.hpp

@@ -0,0 +1,97 @@
+#pragma once
+#include "rsan_defs.hpp"
+namespace Robustness::Action{
+	struct StoreAction{
+		ThreadId tid;
+		Address addr;
+		int size;
+	};
+	struct LoadAction{
+		ThreadId tid;
+		Address addr;
+		int size;
+	};
+	struct AtomicVerifyAction{
+		ThreadId tid;
+		Address addr;
+		morder mo;
+		int size;
+	};
+	struct AtomicVerifyStoreAction{
+		ThreadId tid;
+		Address addr;
+		morder mo;
+		int size;
+	};
+	struct AtomicLoadAction{
+		ThreadId tid;
+		Address addr;
+		morder mo;
+		int size;
+		bool rmw;
+		DebugInfo dbg;
+	};
+	struct AtomicStoreAction{
+		ThreadId tid;
+		Address addr;
+		morder mo;
+		int size;
+		uint64_t oldValue;
+		uint64_t newValue;
+		DebugInfo dbg;
+	};
+	struct AtomicRMWAction{
+		ThreadId tid;
+		Address addr;
+		morder mo;
+		int size;
+		uint64_t oldValue;
+		uint64_t newValue;
+		DebugInfo dbg;
+	};
+	struct AtomicCasAction{
+		ThreadId tid;
+		Address addr;
+		morder mo;
+		int size;
+		uint64_t oldValue;
+		uint64_t newValue;
+		bool success;
+		DebugInfo dbg;
+	};
+	struct FenceAction{
+		ThreadId tid;
+		morder mo;
+	};
+	struct TrackAction{
+		ThreadId tid;
+		Address addr;
+		uint64_t value;
+	};
+	struct WaitAction{
+		ThreadId tid;
+		Address addr;
+		uint64_t value;
+		DebugInfo dbg;
+	};
+	struct BcasAction{
+		ThreadId tid;
+		Address addr;
+		uint64_t value;
+		DebugInfo dbg;
+	};
+	struct ThreadCreate{
+		ThreadId creator, createe;
+	};
+	struct ThreadJoin{
+		ThreadId absorber, absorbee;
+	};
+	struct Free{
+		ThreadId tid;
+		Address addr;
+		uptr size;
+		DebugInfo dbg;
+	};
+}
+
+

compiler-rt/lib/tsan/rtl/rsan_arena.hpp

@@ -0,0 +1,45 @@
+#pragma once
+#include "rsan_vector.h"
+#include "rsan_defs.hpp"
+#include "sanitizer_common/sanitizer_placement_new.h"
+
+namespace Robustness {
+	template< class T >
+		class Arena {
+
+			//const FACTOR = 2;
+			static const u8 BASE = 8;
+
+			u64 cv = 0;
+			u64 ci = 0;
+
+			Vector<Vector<T>> vs;
+			Arena(const Arena&) = delete;
+
+
+			public:
+			Arena() = default;
+			~Arena() {
+				for (auto& v : vs)
+					v.clear();
+			}
+
+			T* allocate(){
+				if (cv == vs.size()){
+					vs.push_back();
+					vs[cv].resize(BASE << (cv));
+					ci = 0;
+				}
+				DCHECK_GT(vs.size(), cv);
+				DCHECK_GT(vs[cv].size(), ci);
+				auto ret = &vs[cv][ci++];
+				DCHECK_GT(ret, 0);
+				if (ci >= vs[cv].size()){
+					++cv;
+				}
+
+				new (ret) T();
+				return ret;
+			}
+		};
+} // namespace Robustness

compiler-rt/lib/tsan/rtl/rsan_defs.hpp

@@ -0,0 +1,90 @@
+#pragma once
+#include "tsan_defs.h"
+#include "tsan_rtl.h"
+#include "sanitizer_common/sanitizer_libc.h"
+#include "sanitizer_common/sanitizer_allocator_internal.h"
+
+//class __tsan::ThreadState;
+
+namespace Robustness{
+	using __tsan::s8;
+	using __tsan::u8;
+	using __tsan::s16;
+	using __tsan::u16;
+	using __tsan::s32;
+	using __tsan::u32;
+	using __tsan::s64;
+	using __tsan::u64;
+	using __tsan::uptr;
+	typedef s64 timestamp_t;
+	typedef s64 ssize_t;
+	typedef u64 uint64_t;
+	typedef s64 int64_t;
+	typedef __PTRDIFF_TYPE__ ptrdiff_t;
+	typedef __SIZE_TYPE__ size_t;
+
+	typedef u8 uint8_t;;
+
+	typedef u64 Address;
+	typedef u64 LocationId;
+	
+	typedef u32 ThreadId;
+
+	using __tsan::InternalScopedString;
+
+	using __tsan::flags;
+
+	using __sanitizer::IsAligned;
+
+	using __sanitizer::LowLevelAllocator;
+	using __sanitizer::InternalAlloc;
+	using __sanitizer::InternalFree;
+	using __sanitizer::internal_memcpy;
+	using __sanitizer::internal_memmove;
+	using __sanitizer::internal_memset;
+	using __sanitizer::RoundUpTo;
+	using __sanitizer::RoundUpToPowerOfTwo;
+	using __sanitizer::GetPageSizeCached;
+	using __sanitizer::MostSignificantSetBitIndex;
+	using __sanitizer::MmapOrDie;
+	using __sanitizer::UnmapOrDie;
+	using __sanitizer::Max;
+	using __sanitizer::Swap;
+	using __sanitizer::forward;
+	using __sanitizer::move;
+
+	using __sanitizer::Printf;
+	using __sanitizer::Report;
+
+	using __sanitizer::Lock;
+	using __sanitizer::Mutex;
+
+	template <typename T1, typename T2>
+	struct Pair{
+		T1 first;
+		T2 second;
+	};
+	template <typename T1, typename T2>
+	auto pair(T1 fst, T2 snd){
+		return Pair<T1, T2>{fst, snd};
+	}
+
+	using __tsan::max;
+	using __tsan::min;
+
+	enum class ViolationType{
+		read, write,
+	};
+
+	struct DebugInfo {
+		__tsan::ThreadState* thr = nullptr;
+		uptr pc = 0xDEADBEEF;
+	};
+
+	template<class>
+		inline constexpr bool always_false_v = false;
+
+	inline bool isRobustness() {
+		return __tsan::flags()->enable_robustness;
+	}
+} //  namespace Robustness