[MC] Rework AVR #121498 to not add extra argument to shouldForceRelocation

MaskRay · MaskRay · commit 8a1b4d0ed2bb · 2025-03-16T23:35:01.000-07:00
This removes the extra argument from commit 814b34f. Also remove unneeded `>= FirstLiteralRelocationKind`.
diff --git a/llvm/include/llvm/MC/MCAsmBackend.h b/llvm/include/llvm/MC/MCAsmBackend.h
@@ -96,7 +96,6 @@ class MCAsmBackend {
   virtual bool shouldForceRelocation(const MCAssembler &Asm,
                                      const MCFixup &Fixup,
                                      const MCValue &Target,
-                                     const uint64_t Value,
                                      const MCSubtargetInfo *STI) {
     return false;
   }
diff --git a/llvm/lib/MC/MCAssembler.cpp b/llvm/lib/MC/MCAssembler.cpp
@@ -221,11 +221,17 @@ bool MCAssembler::evaluateFixup(const MCFixup &Fixup, const MCFragment *DF,
   }
 
   // .reloc directive and the backend might force the relocation.
-  if (IsResolved &&
-      (Fixup.getKind() >= FirstLiteralRelocationKind ||
-       getBackend().shouldForceRelocation(*this, Fixup, Target, Value, STI))) {
-    IsResolved = false;
-    WasForced = true;
+  // Backends that customize shouldForceRelocation generally just need the fixup
+  // kind. AVR needs the fixup value to bypass the assembly time overflow with a
+  // relocation.
+  if (IsResolved) {
+    auto TargetVal = MCValue::get(Target.getSymA(), Target.getSymB(), Value,
+                                  Target.getRefKind());
+    if (Fixup.getKind() >= FirstLiteralRelocationKind ||
+        getBackend().shouldForceRelocation(*this, Fixup, TargetVal, STI)) {
+      IsResolved = false;
+      WasForced = true;
+    }
   }
 
   // A linker relaxation target may emit ADD/SUB relocations for A-B+C. Let
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -98,7 +98,7 @@ class AArch64AsmBackend : public MCAsmBackend {
   unsigned getFixupKindContainereSizeInBytes(unsigned Kind) const;
 
   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
-                             const MCValue &Target, const uint64_t Value,
+                             const MCValue &Target,
                              const MCSubtargetInfo *STI) override;
 };
 
@@ -520,7 +520,6 @@ bool AArch64AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
 bool AArch64AsmBackend::shouldForceRelocation(const MCAssembler &Asm,
                                               const MCFixup &Fixup,
                                               const MCValue &Target,
-                                              const uint64_t,
                                               const MCSubtargetInfo *STI) {
   // The ADRP instruction adds some multiple of 0x1000 to the current PC &
   // ~0xfff. This means that the required offset to reach a symbol can vary by
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -955,7 +955,7 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCAssembler &Asm,
 
 bool ARMAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
                                           const MCFixup &Fixup,
-                                          const MCValue &Target, const uint64_t,
+                                          const MCValue &Target,
                                           const MCSubtargetInfo *STI) {
   const MCSymbolRefExpr *A = Target.getSymA();
   const MCSymbol *Sym = A ? &A->getSymbol() : nullptr;
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
@@ -36,7 +36,7 @@ class ARMAsmBackend : public MCAsmBackend {
   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
 
   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
-                             const MCValue &Target, const uint64_t Value,
+                             const MCValue &Target,
                              const MCSubtargetInfo *STI) override;
 
   unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp b/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
@@ -501,23 +501,22 @@ bool AVRAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
 bool AVRAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
                                           const MCFixup &Fixup,
                                           const MCValue &Target,
-                                          const uint64_t Value,
                                           const MCSubtargetInfo *STI) {
   switch ((unsigned)Fixup.getKind()) {
   default:
-    return Fixup.getKind() >= FirstLiteralRelocationKind;
+    return false;
 
   case AVR::fixup_7_pcrel:
   case AVR::fixup_13_pcrel: {
-    uint64_t ValueEx = Value;
+    uint64_t Offset = Target.getConstant();
     uint64_t Size = AVRAsmBackend::getFixupKindInfo(Fixup.getKind()).TargetSize;
 
     // If the jump is too large to encode it, fall back to a relocation.
     //
     // Note that trying to actually link that relocation *would* fail, but the
     // hopes are that the module we're currently compiling won't be actually
     // linked to the final binary.
-    return !adjust::adjustRelativeBranch(Size, Fixup, ValueEx, STI);
+    return !adjust::adjustRelativeBranch(Size, Fixup, Offset, STI);
   }
 
   case AVR::fixup_call:
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h b/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
@@ -53,7 +53,7 @@ class AVRAsmBackend : public MCAsmBackend {
                     const MCSubtargetInfo *STI) const override;
 
   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
-                             const MCValue &Target, const uint64_t Value,
+                             const MCValue &Target,
                              const MCSubtargetInfo *STI) override;
 
 private:
diff --git a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
@@ -262,7 +262,6 @@ bool CSKYAsmBackend::mayNeedRelaxation(const MCInst &Inst,
 bool CSKYAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
                                            const MCFixup &Fixup,
                                            const MCValue &Target,
-                                           const uint64_t /*Value*/,
                                            const MCSubtargetInfo * /*STI*/) {
   if (Fixup.getKind() >= FirstLiteralRelocationKind)
     return true;
diff --git a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
@@ -52,7 +52,7 @@ class CSKYAsmBackend : public MCAsmBackend {
                     const MCSubtargetInfo *STI) const override;
 
   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
-                             const MCValue &Target, const uint64_t Value,
+                             const MCValue &Target,
                              const MCSubtargetInfo *STI) override;
 
   std::unique_ptr<MCObjectTargetWriter>
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
@@ -201,7 +201,7 @@ class HexagonAsmBackend : public MCAsmBackend {
   }
 
   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
-                             const MCValue &Target, const uint64_t,
+                             const MCValue &Target,
                              const MCSubtargetInfo *STI) override {
     switch(Fixup.getTargetKind()) {
       default:
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
@@ -251,7 +251,6 @@ bool LoongArchAsmBackend::shouldInsertFixupForCodeAlign(MCAssembler &Asm,
 bool LoongArchAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
                                                 const MCFixup &Fixup,
                                                 const MCValue &Target,
-                                                const uint64_t,
                                                 const MCSubtargetInfo *STI) {
   switch (Fixup.getTargetKind()) {
   default:
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
@@ -57,7 +57,7 @@ class LoongArchAsmBackend : public MCAsmBackend {
                                      MCAlignFragment &AF) override;
 
   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
-                             const MCValue &Target, const uint64_t Value,
+                             const MCValue &Target,
                              const MCSubtargetInfo *STI) override;
 
   unsigned getNumFixupKinds() const override {
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -561,7 +561,6 @@ bool MipsAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
 bool MipsAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
                                            const MCFixup &Fixup,
                                            const MCValue &Target,
-                                           const uint64_t,
                                            const MCSubtargetInfo *STI) {
   const unsigned FixupKind = Fixup.getKind();
   switch (FixupKind) {
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
@@ -55,7 +55,7 @@ class MipsAsmBackend : public MCAsmBackend {
                     const MCSubtargetInfo *STI) const override;
 
   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
-                             const MCValue &Target, const uint64_t Value,
+                             const MCValue &Target,
                              const MCSubtargetInfo *STI) override;
 
   bool isMicroMips(const MCSymbol *Sym) const override;
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
@@ -161,7 +161,7 @@ class PPCAsmBackend : public MCAsmBackend {
   }
 
   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
-                             const MCValue &Target, const uint64_t,
+                             const MCValue &Target,
                              const MCSubtargetInfo *STI) override {
     MCFixupKind Kind = Fixup.getKind();
     switch ((unsigned)Kind) {
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -115,7 +115,6 @@ RISCVAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
 bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
                                             const MCFixup &Fixup,
                                             const MCValue &Target,
-                                            const uint64_t,
                                             const MCSubtargetInfo *STI) {
   switch (Fixup.getTargetKind()) {
   default:
@@ -569,7 +568,7 @@ bool RISCVAsmBackend::evaluateTargetFixup(const MCAssembler &Asm,
   Value = Asm.getSymbolOffset(SA) + AUIPCTarget.getConstant();
   Value -= Asm.getFragmentOffset(*AUIPCDF) + AUIPCFixup->getOffset();
 
-  if (shouldForceRelocation(Asm, *AUIPCFixup, AUIPCTarget, Value, STI)) {
+  if (shouldForceRelocation(Asm, *AUIPCFixup, AUIPCTarget, STI)) {
     WasForced = true;
     return false;
   }
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
@@ -65,7 +65,7 @@ class RISCVAsmBackend : public MCAsmBackend {
   createObjectTargetWriter() const override;
 
   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
-                             const MCValue &Target, const uint64_t Value,
+                             const MCValue &Target,
                              const MCSubtargetInfo *STI) override;
 
   bool fixupNeedsRelaxationAdvanced(const MCAssembler &Asm,
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
@@ -273,7 +273,7 @@ namespace {
     }
 
     bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
-                               const MCValue &Target, const uint64_t,
+                               const MCValue &Target,
                                const MCSubtargetInfo *STI) override {
       switch ((Sparc::Fixups)Fixup.getKind()) {
       default:
diff --git a/llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp b/llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
@@ -132,7 +132,7 @@ class VEAsmBackend : public MCAsmBackend {
   }
 
   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
-                             const MCValue &Target, const uint64_t,
+                             const MCValue &Target,
                              const MCSubtargetInfo *STI) override {
     switch ((VE::Fixups)Fixup.getKind()) {
     default:

Original file line number	Diff line number	Diff line change
`@@ -96,7 +96,6 @@ class MCAsmBackend {`
`96`	`96`	`virtual bool shouldForceRelocation(const MCAssembler &Asm,`
`97`	`97`	`const MCFixup &Fixup,`
`98`	`98`	`const MCValue &Target,`
`99`		`- const uint64_t Value,`
`100`	`99`	`const MCSubtargetInfo *STI) {`
`101`	`100`	`return false;`
`102`	`101`	`}`
Original file line number	Diff line number	Diff line change
`@@ -201,7 +201,7 @@ class HexagonAsmBackend : public MCAsmBackend {`
`201`	`201`	`}`
`202`	`202`
`203`	`203`	`bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,`
`204`		`- const MCValue &Target, const uint64_t,`
	`204`	`+ const MCValue &Target,`
`205`	`205`	`const MCSubtargetInfo *STI) override {`
`206`	`206`	`switch(Fixup.getTargetKind()) {`
`207`	`207`	`default:`