Add register use for introduced tests

Author: JanekvO

llvm/test/CodeGen/AMDGPU/multi-call-resource-usage-mcexpr.ll

@@ -1,7 +1,7 @@
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck %s
 
 ; CHECK-LABEL: {{^}}qux
-; CHECK: .set qux.num_vgpr, 0
+; CHECK: .set qux.num_vgpr, 13
 ; CHECK: .set qux.num_agpr, 0
 ; CHECK: .set qux.numbered_sgpr, 32
 ; CHECK: .set qux.private_seg_size, 0
@@ -12,11 +12,12 @@
 ; CHECK: .set qux.has_indirect_call, 0
 define void @qux() {
 entry:
+  call void asm sideeffect "", "~{v12}"()
   ret void
 }
 
 ; CHECK-LABEL: {{^}}baz
-; CHECK: .set baz.num_vgpr, max(32, qux.num_vgpr)
+; CHECK: .set baz.num_vgpr, max(49, qux.num_vgpr)
 ; CHECK: .set baz.num_agpr, max(0, qux.num_agpr)
 ; CHECK: .set baz.numbered_sgpr, max(34, qux.numbered_sgpr)
 ; CHECK: .set baz.private_seg_size, 16+(max(qux.private_seg_size))
@@ -28,11 +29,12 @@ entry:
 define void @baz() {
 entry:
   call void @qux()
+  call void asm sideeffect "", "~{v48}"()
   ret void
 }
 
 ; CHECK-LABEL: {{^}}bar
-; CHECK: .set bar.num_vgpr, max(32, baz.num_vgpr, qux.num_vgpr)
+; CHECK: .set bar.num_vgpr, max(65, baz.num_vgpr, qux.num_vgpr)
 ; CHECK: .set bar.num_agpr, max(0, baz.num_agpr, qux.num_agpr)
 ; CHECK: .set bar.numbered_sgpr, max(34, baz.numbered_sgpr, qux.numbered_sgpr)
 ; CHECK: .set bar.private_seg_size, 16+(max(baz.private_seg_size, qux.private_seg_size))
@@ -46,11 +48,12 @@ entry:
   call void @baz()
   call void @qux()
   call void @baz()
+  call void asm sideeffect "", "~{v64}"()
   ret void
 }
 
 ; CHECK-LABEL: {{^}}foo
-; CHECK: .set foo.num_vgpr, max(32, bar.num_vgpr)
+; CHECK: .set foo.num_vgpr, max(38, bar.num_vgpr)
 ; CHECK: .set foo.num_agpr, max(0, bar.num_agpr)
 ; CHECK: .set foo.numbered_sgpr, max(34, bar.numbered_sgpr)
 ; CHECK: .set foo.private_seg_size, 16+(max(bar.private_seg_size))
@@ -62,6 +65,7 @@ entry:
 define void @foo() {
 entry:
   call void @bar()
+  call void asm sideeffect "", "~{v37}"()
   ret void
 }
 

llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll

@@ -1,9 +1,9 @@
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck %s
 
 ; CHECK-LABEL: {{^}}qux
-; CHECK: .set qux.num_vgpr, max(41, foo.num_vgpr)
+; CHECK: .set qux.num_vgpr, max(71, foo.num_vgpr)
 ; CHECK: .set qux.num_agpr, max(0, foo.num_agpr)
-; CHECK: .set qux.numbered_sgpr, max(34, foo.numbered_sgpr)
+; CHECK: .set qux.numbered_sgpr, max(46, foo.numbered_sgpr)
 ; CHECK: .set qux.private_seg_size, 16
 ; CHECK: .set qux.uses_vcc, or(1, foo.uses_vcc)
 ; CHECK: .set qux.uses_flat_scratch, or(0, foo.uses_flat_scratch)
@@ -12,9 +12,9 @@
 ; CHECK: .set qux.has_indirect_call, or(0, foo.has_indirect_call)
 
 ; CHECK-LABEL: {{^}}baz
-; CHECK: .set baz.num_vgpr, max(42, qux.num_vgpr)
+; CHECK: .set baz.num_vgpr, max(61, qux.num_vgpr)
 ; CHECK: .set baz.num_agpr, max(0, qux.num_agpr)
-; CHECK: .set baz.numbered_sgpr, max(34, qux.numbered_sgpr)
+; CHECK: .set baz.numbered_sgpr, max(51, qux.numbered_sgpr)
 ; CHECK: .set baz.private_seg_size, 16+(max(qux.private_seg_size))
 ; CHECK: .set baz.uses_vcc, or(1, qux.uses_vcc)
 ; CHECK: .set baz.uses_flat_scratch, or(0, qux.uses_flat_scratch)
@@ -23,9 +23,9 @@
 ; CHECK: .set baz.has_indirect_call, or(0, qux.has_indirect_call)
 
 ; CHECK-LABEL: {{^}}bar
-; CHECK: .set bar.num_vgpr, max(42, baz.num_vgpr)
+; CHECK: .set bar.num_vgpr, max(51, baz.num_vgpr)
 ; CHECK: .set bar.num_agpr, max(0, baz.num_agpr)
-; CHECK: .set bar.numbered_sgpr, max(34, baz.numbered_sgpr)
+; CHECK: .set bar.numbered_sgpr, max(61, baz.numbered_sgpr)
 ; CHECK: .set bar.private_seg_size, 16+(max(baz.private_seg_size))
 ; CHECK: .set bar.uses_vcc, or(1, baz.uses_vcc)
 ; CHECK: .set bar.uses_flat_scratch, or(0, baz.uses_flat_scratch)
@@ -34,9 +34,9 @@
 ; CHECK: .set bar.has_indirect_call, or(0, baz.has_indirect_call)
 
 ; CHECK-LABEL: {{^}}foo
-; CHECK: .set foo.num_vgpr, max(42, amdgpu.max_num_vgpr)
+; CHECK: .set foo.num_vgpr, max(46, amdgpu.max_num_vgpr)
 ; CHECK: .set foo.num_agpr, max(0, amdgpu.max_num_agpr)
-; CHECK: .set foo.numbered_sgpr, max(34, amdgpu.max_num_sgpr)
+; CHECK: .set foo.numbered_sgpr, max(71, amdgpu.max_num_sgpr)
 ; CHECK: .set foo.private_seg_size, 16
 ; CHECK: .set foo.uses_vcc, 1
 ; CHECK: .set foo.uses_flat_scratch, 0
@@ -47,24 +47,32 @@
 define void @foo() {
 entry:
   call void @bar()
+  call void asm sideeffect "", "~{v45}"()
+  call void asm sideeffect "", "~{s70}"()
   ret void
 }
 
 define void @bar() {
 entry:
   call void @baz()
+  call void asm sideeffect "", "~{v50}"()
+  call void asm sideeffect "", "~{s60}"()
   ret void
 }
 
 define void @baz() {
 entry:
   call void @qux()
+  call void asm sideeffect "", "~{v60}"()
+  call void asm sideeffect "", "~{s50}"()
   ret void
 }
 
 define void @qux() {
 entry:
   call void @foo()
+  call void asm sideeffect "", "~{v70}"()
+  call void asm sideeffect "", "~{s45}"()
   ret void
 }