AS

Author: optimisan

llvm/lib/CodeGen/PostRAHazardRecognizer.cpp

@@ -74,6 +74,7 @@ llvm::PostRAHazardRecognizerPass::run(MachineFunction &MF,
                                       MachineFunctionAnalysisManager &MFAM) {
   if (!PostRAHazardRecognizer().run(MF))
     return PreservedAnalyses::all();
+
   auto PA = getMachineFunctionPassPreservedAnalyses();
   PA.preserveSet<CFGAnalyses>();
   return PA;

llvm/test/CodeGen/AMDGPU/break-smem-soft-clauses.mir

@@ -1,7 +1,7 @@
 # RUN: llc -mtriple=amdgcn -mcpu=carrizo -verify-machineinstrs -run-pass  post-RA-hazard-rec %s -o - | FileCheck -check-prefixes=GCN,XNACK %s
 # RUN: llc -mtriple=amdgcn -mcpu=fiji -mattr=-xnack -verify-machineinstrs -run-pass  post-RA-hazard-rec %s -o - | FileCheck -check-prefixes=GCN %s
 
-# RUN: llc -mtriple=amdgcn -mcpu=fiji -mattr=-xnack -verify-machineinstrs -passes post-RA-hazard-rec %s -o - | FileCheck -check-prefixes=GCN %s
+# RUN: llc -mtriple=amdgcn -mcpu=fiji -mattr=-xnack -passes post-RA-hazard-rec %s -o - | FileCheck -check-prefixes=GCN %s
 
 ---
 # Trivial clause at beginning of program

llvm/test/CodeGen/AMDGPU/hazard-flat-instruction-valu-check.mir

@@ -1,6 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
 # RUN: llc -mtriple=amdgcn -mcpu=gfx942 -verify-machineinstrs -run-pass=post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN %s
-# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -verify-machineinstrs -passes=post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -passes=post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN %s
 
 ---
 name:            test_flat_valu_hazard