Merge branch 'llvm:main' into main

Author: colawithsauce

clang/test/CodeGen/SystemZ/encoding.c

@@ -0,0 +1,9 @@
+// Checks encoding of output file
+// This is only required for z/OS.
+//
+// REQUIRES: system-zos, systemz-registered-target
+// RUN: %clang_cc1 -triple s390x-ibm-zos -S %s -o %t.s
+// RUN: ls -T %t.s | FileCheck %s
+
+// CHECK: t IBM-1047    T=on
+void foo() { return; }

lldb/tools/debugserver/source/MacOSX/MachProcess.mm

@@ -1739,7 +1739,7 @@ static uint64_t bits(uint64_t value, uint32_t msbit, uint32_t lsbit) {
     ReplyToAllExceptions();
   }
 
-  m_task.ShutDownExcecptionThread();
+  m_task.ShutDownExceptionThread();
 
   // Detach from our process
   errno = 0;

lldb/tools/debugserver/source/MacOSX/MachTask.h

@@ -68,7 +68,7 @@ class MachTask {
   bool ExceptionPortIsValid() const;
   kern_return_t SaveExceptionPortInfo();
   kern_return_t RestoreExceptionPortInfo();
-  kern_return_t ShutDownExcecptionThread();
+  void ShutDownExceptionThread();
 
   bool StartExceptionThread(
       const RNBContext::IgnoredExceptions &ignored_exceptions, DNBError &err);

lldb/tools/debugserver/source/MacOSX/MachTask.mm

@@ -145,10 +145,8 @@
 //----------------------------------------------------------------------
 void MachTask::Clear() {
   // Do any cleanup needed for this task
-  if (m_exception_thread)
-    ShutDownExcecptionThread();
+  ShutDownExceptionThread();
   m_task = TASK_NULL;
-  m_exception_thread = 0;
   m_exception_port = MACH_PORT_NULL;
   m_exec_will_be_suspended = false;
   m_do_double_resume = false;
@@ -685,8 +683,11 @@ static void get_threads_profile_data(DNBProfileDataScanType scanType,
   return false;
 }
 
-kern_return_t MachTask::ShutDownExcecptionThread() {
+void MachTask::ShutDownExceptionThread() {
   DNBError err;
+  
+  if (!m_exception_thread)
+    return;
 
   err = RestoreExceptionPortInfo();
 
@@ -702,6 +703,8 @@ static void get_threads_profile_data(DNBProfileDataScanType scanType,
   if (DNBLogCheckLogBit(LOG_TASK) || err.Fail())
     err.LogThreaded("::pthread_join ( thread = %p, value_ptr = NULL)",
                     m_exception_thread);
+                    
+  m_exception_thread = nullptr;
 
   // Deallocate our exception port that we used to track our child process
   mach_port_t task_self = mach_task_self();
@@ -713,7 +716,7 @@ static void get_threads_profile_data(DNBProfileDataScanType scanType,
   m_exec_will_be_suspended = false;
   m_do_double_resume = false;
 
-  return err.Status();
+  return;
 }
 
 void *MachTask::ExceptionThread(void *arg) {

llvm/lib/Support/VirtualOutputBackends.cpp

@@ -254,6 +254,20 @@ static Error createDirectoriesOnDemand(StringRef OutputPath,
   });
 }
 
+static sys::fs::OpenFlags generateFlagsFromConfig(OutputConfig Config) {
+  sys::fs::OpenFlags OF = sys::fs::OF_None;
+  if (Config.getTextWithCRLF())
+    OF |= sys::fs::OF_TextWithCRLF;
+  else if (Config.getText())
+    OF |= sys::fs::OF_Text;
+  // Don't pass OF_Append if writting to temporary since OF_Append is
+  // not Atomic Append
+  if (Config.getAppend() && !Config.getAtomicWrite())
+    OF |= sys::fs::OF_Append;
+
+  return OF;
+}
+
 Error OnDiskOutputFile::tryToCreateTemporary(std::optional<int> &FD) {
   // Create a temporary file.
   // Insert -%%%%%%%% before the extension (if any), and because some tools
@@ -269,8 +283,9 @@ Error OnDiskOutputFile::tryToCreateTemporary(std::optional<int> &FD) {
   return createDirectoriesOnDemand(OutputPath, Config, [&]() -> Error {
     int NewFD;
     SmallString<128> UniquePath;
+    sys::fs::OpenFlags OF = generateFlagsFromConfig(Config);
     if (std::error_code EC =
-            sys::fs::createUniqueFile(ModelPath, NewFD, UniquePath))
+            sys::fs::createUniqueFile(ModelPath, NewFD, UniquePath, OF))
       return make_error<TempFileOutputError>(ModelPath, OutputPath, EC);
 
     if (Config.getDiscardOnSignal())
@@ -312,13 +327,7 @@ Error OnDiskOutputFile::initializeFile(std::optional<int> &FD) {
   // Not using a temporary file. Open the final output file.
   return createDirectoriesOnDemand(OutputPath, Config, [&]() -> Error {
     int NewFD;
-    sys::fs::OpenFlags OF = sys::fs::OF_None;
-    if (Config.getTextWithCRLF())
-      OF |= sys::fs::OF_TextWithCRLF;
-    else if (Config.getText())
-      OF |= sys::fs::OF_Text;
-    if (Config.getAppend())
-      OF |= sys::fs::OF_Append;
+    sys::fs::OpenFlags OF = generateFlagsFromConfig(Config);
     if (std::error_code EC = sys::fs::openFileForWrite(
             OutputPath, NewFD, sys::fs::CD_CreateAlways, OF))
       return convertToOutputError(OutputPath, EC);

llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

@@ -7044,6 +7044,12 @@ ParseStatus AMDGPUAsmParser::parseNamedBit(StringRef Name,
   if (Name == "a16" && !hasA16())
     return Error(S, "a16 modifier is not supported on this GPU");
 
+  if (Bit == 0 && Name == "gds") {
+    StringRef Mnemo = ((AMDGPUOperand &)*Operands[0]).getToken();
+    if (Mnemo.starts_with("ds_gws"))
+      return Error(S, "nogds is not allowed");
+  }
+
   if (isGFX9() && ImmTy == AMDGPUOperand::ImmTyA16)
     ImmTy = AMDGPUOperand::ImmTyR128A16;
 

llvm/lib/Target/Xtensa/CMakeLists.txt

@@ -10,6 +10,7 @@ tablegen(LLVM XtensaGenDisassemblerTables.inc -gen-disassembler)
 tablegen(LLVM XtensaGenInstrInfo.inc -gen-instr-info)
 tablegen(LLVM XtensaGenMCCodeEmitter.inc -gen-emitter)
 tablegen(LLVM XtensaGenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM XtensaGenSDNodeInfo.inc -gen-sd-node-info)
 tablegen(LLVM XtensaGenSubtargetInfo.inc -gen-subtarget)
 
 add_public_tablegen_target(XtensaCommonTableGen)
@@ -22,6 +23,7 @@ add_llvm_target(XtensaCodeGen
   XtensaISelDAGToDAG.cpp
   XtensaISelLowering.cpp
   XtensaRegisterInfo.cpp
+  XtensaSelectionDAGInfo.cpp
   XtensaSubtarget.cpp
   XtensaTargetMachine.cpp
 

llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp

@@ -12,6 +12,7 @@
 
 #include "MCTargetDesc/XtensaMCTargetDesc.h"
 #include "Xtensa.h"
+#include "XtensaSelectionDAGInfo.h"
 #include "XtensaTargetMachine.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"

llvm/lib/Target/Xtensa/XtensaISelLowering.cpp

@@ -15,6 +15,7 @@
 #include "XtensaConstantPoolValue.h"
 #include "XtensaInstrInfo.h"
 #include "XtensaMachineFunctionInfo.h"
+#include "XtensaSelectionDAGInfo.h"
 #include "XtensaSubtarget.h"
 #include "XtensaTargetMachine.h"
 #include "llvm/CodeGen/CallingConvLower.h"
@@ -1510,58 +1511,6 @@ SDValue XtensaTargetLowering::LowerOperation(SDValue Op,
   }
 }
 
-const char *XtensaTargetLowering::getTargetNodeName(unsigned Opcode) const {
-  switch (Opcode) {
-  case XtensaISD::BR_JT:
-    return "XtensaISD::BR_JT";
-  case XtensaISD::CALL:
-    return "XtensaISD::CALL";
-  case XtensaISD::CALLW8:
-    return "XtensaISD::CALLW8";
-  case XtensaISD::EXTUI:
-    return "XtensaISD::EXTUI";
-  case XtensaISD::MOVSP:
-    return "XtensaISD::MOVSP";
-  case XtensaISD::PCREL_WRAPPER:
-    return "XtensaISD::PCREL_WRAPPER";
-  case XtensaISD::RET:
-    return "XtensaISD::RET";
-  case XtensaISD::RETW:
-    return "XtensaISD::RETW";
-  case XtensaISD::RUR:
-    return "XtensaISD::RUR";
-  case XtensaISD::SELECT_CC:
-    return "XtensaISD::SELECT_CC";
-  case XtensaISD::SELECT_CC_FP:
-    return "XtensaISD::SELECT_CC_FP";
-  case XtensaISD::SRCL:
-    return "XtensaISD::SRCL";
-  case XtensaISD::SRCR:
-    return "XtensaISD::SRCR";
-  case XtensaISD::CMPUO:
-    return "XtensaISD::CMPUO";
-  case XtensaISD::CMPUEQ:
-    return "XtensaISD::CMPUEQ";
-  case XtensaISD::CMPULE:
-    return "XtensaISD::CMPULE";
-  case XtensaISD::CMPULT:
-    return "XtensaISD::CMPULT";
-  case XtensaISD::CMPOEQ:
-    return "XtensaISD::CMPOEQ";
-  case XtensaISD::CMPOLE:
-    return "XtensaISD::CMPOLE";
-  case XtensaISD::CMPOLT:
-    return "XtensaISD::CMPOLT";
-  case XtensaISD::MADD:
-    return "XtensaISD::MADD";
-  case XtensaISD::MSUB:
-    return "XtensaISD::MSUB";
-  case XtensaISD::MOVS:
-    return "XtensaISD::MOVS";
-  }
-  return nullptr;
-}
-
 TargetLowering::AtomicExpansionKind
 XtensaTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
   return AtomicExpansionKind::CmpXChg;

llvm/lib/Target/Xtensa/XtensaISelLowering.h

@@ -20,67 +20,6 @@
 
 namespace llvm {
 
-namespace XtensaISD {
-enum {
-  FIRST_NUMBER = ISD::BUILTIN_OP_END,
-  BR_JT,
-
-  // Calls a function.  Operand 0 is the chain operand and operand 1
-  // is the target address.  The arguments start at operand 2.
-  // There is an optional glue operand at the end.
-  CALL,
-  // Call with rotation window by 8 registers
-  CALLW8,
-
-  // Extract unsigned immediate. Operand 0 is value, operand 1
-  // is bit position of the field [0..31], operand 2 is bit size
-  // of the field [1..16]
-  EXTUI,
-
-  MOVSP,
-
-  // Wraps a TargetGlobalAddress that should be loaded using PC-relative
-  // accesses.  Operand 0 is the address.
-  PCREL_WRAPPER,
-  RET,
-  RETW,
-
-  RUR,
-
-  // Select with condition operator - This selects between a true value and
-  // a false value (ops #2 and #3) based on the boolean result of comparing
-  // the lhs and rhs (ops #0 and #1) of a conditional expression with the
-  // condition code in op #4
-  SELECT_CC,
-  // Select with condition operator - This selects between a true value and
-  // a false value (ops #2 and #3) based on the boolean result of comparing
-  // f32 operands lhs and rhs (ops #0 and #1) of a conditional expression
-  // with the condition code in op #4 and boolean branch kind in op #5
-  SELECT_CC_FP,
-
-  // SRCL(R) performs shift left(right) of the concatenation of 2 registers
-  // and returns high(low) 32-bit part of 64-bit result
-  SRCL,
-  // Shift Right Combined
-  SRCR,
-
-  // Floating point unordered compare conditions
-  CMPUEQ,
-  CMPULE,
-  CMPULT,
-  CMPUO,
-  // Floating point compare conditions
-  CMPOEQ,
-  CMPOLE,
-  CMPOLT,
-  // FP multipy-add/sub
-  MADD,
-  MSUB,
-  // FP move
-  MOVS,
-};
-}
-
 class XtensaSubtarget;
 
 class XtensaTargetLowering : public TargetLowering {
@@ -104,8 +43,6 @@ class XtensaTargetLowering : public TargetLowering {
 
   bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
 
-  const char *getTargetNodeName(unsigned Opcode) const override;
-
   bool isFPImmLegal(const APFloat &Imm, EVT VT,
                     bool ForCodeSize) const override;