Clean up some details

Author: Sterling-Augustine

llvm/lib/MC/MCSFrame.cpp

@@ -75,8 +75,9 @@ struct SFrameFDE {
                                 MCFixup::getDataKindForSize(4)));
     S.emitInt32(0);
 
-    // sfde_func_start_num_fres
-    S.emitInt32(FREs.size());
+    // sfde_func_num_fres
+    // TODO: When we actually emit fres, replace 0 with FREs.size()
+    S.emitInt32(0);
 
     // sfde_func_info word
     FDEInfo<endianness::native> I;
@@ -121,7 +122,7 @@ class SFrameEmitterImpl {
     }
     Streamer.getContext().reportWarning(
         I.getLoc(), "Canonical Frame Address not in stack- or frame-pointer. "
-                    "Omitting SFrame unwind info.");
+                    "Omitting SFrame unwind info for this function.");
     FDE.Invalid = true;
     return false;
   }
@@ -132,8 +133,8 @@ class SFrameEmitterImpl {
       return true;
 
     Streamer.getContext().reportWarning(
-        I.getLoc(), "skipping SFrame FDE; .cfi_def_cfa_offset "
-                      "without CFA base register in effect");
+        I.getLoc(), "Adjusting CFA offset without a base register. "
+                    "Omitting SFrame unwind info for this function.");
     FDE.Invalid = true;
     return false;
   }
@@ -241,11 +242,11 @@ class SFrameEmitterImpl {
     // sets the DF.RAReg.
     // FIXME: This also prevents providing a proper location for the error.
     // LLVM doesn't change the return column itself, so this was
-    // externally-generated assembly.
+    // hand-written assembly.
     if (DF.RAReg != RAReg) {
       Streamer.getContext().reportWarning(
-          SMLoc(),
-          "skipping SFrame FDE; non-default RA register " + Twine(DF.RAReg));
+          SMLoc(), "Non-default RA register " + Twine(DF.RAReg) +
+                       ". Omitting SFrame unwind info for this function.");
       // Continue with the FDE to find any addtional errors. Discard it at
       // the end.
       FDE.Invalid = true;
@@ -308,8 +309,8 @@ class SFrameEmitterImpl {
     Streamer.emitInt32(FDEs.size());
     // shf_num_fres
     uint32_t TotalFREs = 0;
-    for (auto &FDE : FDEs)
-      TotalFREs += FDE.FREs.size();
+    //    for (auto &FDE : FDEs)
+    // TotalFREs += FDE.FREs.size();
     Streamer.emitInt32(TotalFREs);
 
     // shf_fre_len

llvm/test/MC/ELF/cfi-sframe-errors.s

@@ -0,0 +1,35 @@
+// TODO: Add other architectures as they gain sframe support
+// REQUIRES: x86-registered-target
+// RUN: llvm-mc --assemble --filetype=obj --gsframe -triple x86_64 %s -o %t.o  2>&1 | FileCheck %s
+// RUN: llvm-readelf --sframe %t.o | FileCheck --check-prefix=CHECK-NOFDES %s
+
+
+	.cfi_sections .sframe
+f1:
+	.cfi_startproc simple
+	nop
+	.cfi_def_cfa_offset 16     // No base register yet
+	nop
+	.cfi_adjust_cfa_offset 16  // No base register yet
+	nop
+	.cfi_return_column 0
+	nop
+	.cfi_endproc
+
+f2:	
+	.cfi_startproc
+	nop
+	.cfi_def_cfa 0, 4
+	nop
+	
+        .cfi_endproc
+
+// CHECK: Non-default RA register {{.*}}
+// asm parser doesn't give a location with .cfi_def_cfa_offset
+// CHECK: :0:{{.*}} Adjusting CFA offset without a base register.{{.*}}
+// .cfi_adjust_cfa_offset
+// CHECK: :13:{{.*}} Adjusting CFA offset without a base register. {{.*}}
+// CHECK: Canonical Frame Address not in stack- or frame-pointer. {{.*}}
+
+// CHECK-NOFDES:    Num FDEs: 0
+// CHECK-NOFDES:    Num FREs: 0

llvm/test/MC/ELF/cfi-sframe.s

@@ -5,8 +5,18 @@
 
 	.cfi_sections .sframe
 f1:
-	.cfi_startproc
+	.cfi_startproc  // FRE 0
+	nop
+	.cfi_def_cfa_offset 16  // FRE 1
+	.cfi_def_cfa_offset 8   // location didn't change. No new FRE, but new offset.
+	nop
+	.cfi_def_cfa_offset 8   // offset didn't change. No new FRE.
 	nop
+	.cfi_def_cfa_offset 16  // FRE 2. new location, new offset.
+	nop
+	.cfi_register 0, 1      // Uninteresting register. No new FRE.
+	nop
+	
         .cfi_endproc
 
 f2:
@@ -32,11 +42,11 @@ f2:
 // CHECK:    Function Index [
 // CHECK-NEXT:        FuncDescEntry [0] {
 // CHECK-NEXT:          PC {
-// CHECK-NEXT:            Relocation: {{.*}}32{{.*}}
+// CHECK-NEXT:            Relocation: {{.*}}PC32{{.*}}
 // CHECK-NEXT:            Symbol Name: .text
-// CHECK-NEXT:            Start Address: 0x0
+// CHECK-NEXT:            Start Address: {{.*}}
 // CHECK-NEXT:          }
-// CHECK-NEXT:          Size: 0x1
+// CHECK-NEXT:          Size: 0x5
 // CHECK-NEXT:          Start FRE Offset: 0x0
 // CHECK-NEXT:          Num FREs: 0
 // CHECK-NEXT:          Info {
@@ -51,7 +61,7 @@ f2:
 // CHECK-NEXT:        }
 // CHECK-NEXT:        FuncDescEntry [1] {
 // CHECK-NEXT:          PC {
-// CHECK-NEXT:            Relocation: R_X86_64_PC32
+// CHECK-NEXT:            Relocation: {{.*}}PC32{{.*}}
 // CHECK-NEXT:            Symbol Name: .text
 // CHECK-NEXT:            Start Address: {{.*}}
 // CHECK-NEXT:          }