@@ -1732,57 +1732,57 @@ _mm256_mask_compressstoreu_epi32 (void *__P, __mmask8 __U, __m256i __A) {
17321732 (__mmask8) __U);
17331733}
17341734
1735- static __inline__ __m128d __DEFAULT_FN_ATTRS128
1736- _mm_mask_cvtepi32_pd (__m128d __W, __mmask8 __U, __m128i __A) {
1735+ static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1736+ _mm_mask_cvtepi32_pd (__m128d __W, __mmask8 __U, __m128i __A) {
17371737 return (__m128d)__builtin_ia32_selectpd_128 ((__mmask8) __U,
17381738 (__v2df)_mm_cvtepi32_pd (__A),
17391739 (__v2df)__W);
17401740}
17411741
1742- static __inline__ __m128d __DEFAULT_FN_ATTRS128
1743- _mm_maskz_cvtepi32_pd (__mmask8 __U, __m128i __A) {
1742+ static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1743+ _mm_maskz_cvtepi32_pd (__mmask8 __U, __m128i __A) {
17441744 return (__m128d)__builtin_ia32_selectpd_128 ((__mmask8) __U,
17451745 (__v2df)_mm_cvtepi32_pd (__A),
17461746 (__v2df)_mm_setzero_pd ());
17471747}
17481748
1749- static __inline__ __m256d __DEFAULT_FN_ATTRS256
1750- _mm256_mask_cvtepi32_pd (__m256d __W, __mmask8 __U, __m128i __A) {
1749+ static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1750+ _mm256_mask_cvtepi32_pd (__m256d __W, __mmask8 __U, __m128i __A) {
17511751 return (__m256d)__builtin_ia32_selectpd_256 ((__mmask8) __U,
17521752 (__v4df)_mm256_cvtepi32_pd (__A),
17531753 (__v4df)__W);
17541754}
17551755
1756- static __inline__ __m256d __DEFAULT_FN_ATTRS256
1757- _mm256_maskz_cvtepi32_pd (__mmask8 __U, __m128i __A) {
1756+ static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1757+ _mm256_maskz_cvtepi32_pd (__mmask8 __U, __m128i __A) {
17581758 return (__m256d)__builtin_ia32_selectpd_256 ((__mmask8) __U,
17591759 (__v4df)_mm256_cvtepi32_pd (__A),
17601760 (__v4df)_mm256_setzero_pd ());
17611761}
17621762
1763- static __inline__ __m128 __DEFAULT_FN_ATTRS128
1764- _mm_mask_cvtepi32_ps (__m128 __W, __mmask8 __U, __m128i __A) {
1763+ static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1764+ _mm_mask_cvtepi32_ps (__m128 __W, __mmask8 __U, __m128i __A) {
17651765 return (__m128)__builtin_ia32_selectps_128 ((__mmask8)__U,
17661766 (__v4sf)_mm_cvtepi32_ps (__A),
17671767 (__v4sf)__W);
17681768}
17691769
1770- static __inline__ __m128 __DEFAULT_FN_ATTRS128
1771- _mm_maskz_cvtepi32_ps (__mmask8 __U, __m128i __A) {
1770+ static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1771+ _mm_maskz_cvtepi32_ps (__mmask8 __U, __m128i __A) {
17721772 return (__m128)__builtin_ia32_selectps_128 ((__mmask8)__U,
17731773 (__v4sf)_mm_cvtepi32_ps (__A),
17741774 (__v4sf)_mm_setzero_ps ());
17751775}
17761776
1777- static __inline__ __m256 __DEFAULT_FN_ATTRS256
1778- _mm256_mask_cvtepi32_ps (__m256 __W, __mmask8 __U, __m256i __A) {
1777+ static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1778+ _mm256_mask_cvtepi32_ps (__m256 __W, __mmask8 __U, __m256i __A) {
17791779 return (__m256)__builtin_ia32_selectps_256 ((__mmask8)__U,
17801780 (__v8sf)_mm256_cvtepi32_ps (__A),
17811781 (__v8sf)__W);
17821782}
17831783
1784- static __inline__ __m256 __DEFAULT_FN_ATTRS256
1785- _mm256_maskz_cvtepi32_ps (__mmask8 __U, __m256i __A) {
1784+ static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1785+ _mm256_maskz_cvtepi32_ps (__mmask8 __U, __m256i __A) {
17861786 return (__m256)__builtin_ia32_selectps_256 ((__mmask8)__U,
17871787 (__v8sf)_mm256_cvtepi32_ps (__A),
17881788 (__v8sf)_mm256_setzero_ps ());
@@ -2143,78 +2143,78 @@ _mm256_maskz_cvttps_epu32 (__mmask8 __U, __m256 __A) {
21432143 (__mmask8) __U);
21442144}
21452145
2146- static __inline__ __m128d __DEFAULT_FN_ATTRS128
2147- _mm_cvtepu32_pd (__m128i __A) {
2146+ static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2147+ _mm_cvtepu32_pd (__m128i __A) {
21482148 return (__m128d) __builtin_convertvector (
21492149 __builtin_shufflevector ((__v4su)__A, (__v4su)__A, 0 , 1 ), __v2df);
21502150}
21512151
2152- static __inline__ __m128d __DEFAULT_FN_ATTRS128
2153- _mm_mask_cvtepu32_pd (__m128d __W, __mmask8 __U, __m128i __A) {
2152+ static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2153+ _mm_mask_cvtepu32_pd (__m128d __W, __mmask8 __U, __m128i __A) {
21542154 return (__m128d)__builtin_ia32_selectpd_128 ((__mmask8) __U,
21552155 (__v2df)_mm_cvtepu32_pd (__A),
21562156 (__v2df)__W);
21572157}
21582158
2159- static __inline__ __m128d __DEFAULT_FN_ATTRS128
2160- _mm_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) {
2159+ static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2160+ _mm_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) {
21612161 return (__m128d)__builtin_ia32_selectpd_128 ((__mmask8) __U,
21622162 (__v2df)_mm_cvtepu32_pd (__A),
21632163 (__v2df)_mm_setzero_pd ());
21642164}
21652165
2166- static __inline__ __m256d __DEFAULT_FN_ATTRS256
2167- _mm256_cvtepu32_pd (__m128i __A) {
2166+ static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2167+ _mm256_cvtepu32_pd (__m128i __A) {
21682168 return (__m256d)__builtin_convertvector ((__v4su)__A, __v4df);
21692169}
21702170
2171- static __inline__ __m256d __DEFAULT_FN_ATTRS256
2172- _mm256_mask_cvtepu32_pd (__m256d __W, __mmask8 __U, __m128i __A) {
2171+ static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2172+ _mm256_mask_cvtepu32_pd (__m256d __W, __mmask8 __U, __m128i __A) {
21732173 return (__m256d)__builtin_ia32_selectpd_256 ((__mmask8) __U,
21742174 (__v4df)_mm256_cvtepu32_pd (__A),
21752175 (__v4df)__W);
21762176}
21772177
2178- static __inline__ __m256d __DEFAULT_FN_ATTRS256
2179- _mm256_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) {
2178+ static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2179+ _mm256_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) {
21802180 return (__m256d)__builtin_ia32_selectpd_256 ((__mmask8) __U,
21812181 (__v4df)_mm256_cvtepu32_pd (__A),
21822182 (__v4df)_mm256_setzero_pd ());
21832183}
21842184
2185- static __inline__ __m128 __DEFAULT_FN_ATTRS128
2186- _mm_cvtepu32_ps (__m128i __A) {
2185+ static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2186+ _mm_cvtepu32_ps (__m128i __A) {
21872187 return (__m128)__builtin_convertvector ((__v4su)__A, __v4sf);
21882188}
21892189
2190- static __inline__ __m128 __DEFAULT_FN_ATTRS128
2191- _mm_mask_cvtepu32_ps (__m128 __W, __mmask8 __U, __m128i __A) {
2190+ static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2191+ _mm_mask_cvtepu32_ps (__m128 __W, __mmask8 __U, __m128i __A) {
21922192 return (__m128)__builtin_ia32_selectps_128 ((__mmask8)__U,
21932193 (__v4sf)_mm_cvtepu32_ps (__A),
21942194 (__v4sf)__W);
21952195}
21962196
2197- static __inline__ __m128 __DEFAULT_FN_ATTRS128
2198- _mm_maskz_cvtepu32_ps (__mmask8 __U, __m128i __A) {
2197+ static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2198+ _mm_maskz_cvtepu32_ps (__mmask8 __U, __m128i __A) {
21992199 return (__m128)__builtin_ia32_selectps_128 ((__mmask8)__U,
22002200 (__v4sf)_mm_cvtepu32_ps (__A),
22012201 (__v4sf)_mm_setzero_ps ());
22022202}
22032203
2204- static __inline__ __m256 __DEFAULT_FN_ATTRS256
2205- _mm256_cvtepu32_ps (__m256i __A) {
2204+ static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2205+ _mm256_cvtepu32_ps (__m256i __A) {
22062206 return (__m256)__builtin_convertvector ((__v8su)__A, __v8sf);
22072207}
22082208
2209- static __inline__ __m256 __DEFAULT_FN_ATTRS256
2210- _mm256_mask_cvtepu32_ps (__m256 __W, __mmask8 __U, __m256i __A) {
2209+ static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2210+ _mm256_mask_cvtepu32_ps (__m256 __W, __mmask8 __U, __m256i __A) {
22112211 return (__m256)__builtin_ia32_selectps_256 ((__mmask8)__U,
22122212 (__v8sf)_mm256_cvtepu32_ps (__A),
22132213 (__v8sf)__W);
22142214}
22152215
2216- static __inline__ __m256 __DEFAULT_FN_ATTRS256
2217- _mm256_maskz_cvtepu32_ps (__mmask8 __U, __m256i __A) {
2216+ static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2217+ _mm256_maskz_cvtepu32_ps (__mmask8 __U, __m256i __A) {
22182218 return (__m256)__builtin_ia32_selectps_256 ((__mmask8)__U,
22192219 (__v8sf)_mm256_cvtepu32_ps (__A),
22202220 (__v8sf)_mm256_setzero_ps ());
0 commit comments