Took xry's idea

Author: heiher

llvm/test/CodeGen/LoongArch/inline-asm-constraint-q.ll

@@ -6,15 +6,16 @@ define i32 @constraint_q_not_r0() {
 ; CHECK-NOT:    csrxchg ${{[a-z]*}}, $r0, 0
 ; CHECK-NOT:    csrxchg ${{[a-z]*}}, $zero, 0
 entry:
-  %1 = tail call i32 asm "csrxchg $0, $1, $2", "=r,q,i,0"(i32 0, i32 0, i32 0)
-  ret i32 %1
+  %2 = tail call i32 asm "csrxchg $0, $1, 0", "=r,q,0"(i32 0, i32 0)
+  ret i32 %2
 }
 
 ;; Check that the "q" operand is not R1.
-define i32 @constraint_q_not_r1() {
+define i32 @constraint_q_not_r1(i32 %0) {
 ; CHECK-NOT:    csrxchg ${{[a-z]*}}, $r1, 0
 ; CHECK-NOT:    csrxchg ${{[a-z]*}}, $ra, 0
 entry:
-  %0 = tail call i32 asm "csrxchg $0, $1, $2", "=r,q,i,{r4},{r5},{r6},{r7},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},{r16},{r17},{r18},{r19},{r20},{r23},{r24},{r25},{r26},{r27},{r28},{r29},{r30},{r31},0"(i32 4, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
-  ret i32 %0
+  %2 = tail call i32 asm "", "={$r1},{$r1}"(i32 undef)
+  %3 = tail call i32 asm "csrxchg $0, $1, 0", "=r,q,0"(i32 %2, i32 %0)
+  ret i32 %3
 }