@@ -1179,9 +1179,9 @@ void real_on_scalar_with_type_promotion() {
11791179// CIR: %[[A_ADDR:.*]] = cir.alloca !cir.f16, !cir.ptr<!cir.f16>, ["a"]
11801180// CIR: %[[B_ADDR:.*]] = cir.alloca !cir.f16, !cir.ptr<!cir.f16>, ["b", init]
11811181// CIR: %[[TMP_A:.*]] = cir.load{{.*}} %[[A_ADDR]] : !cir.ptr<!cir.f16>, !cir.f16
1182- // CIR: %[[TMP_A_F32:.*]] = cir.cast( floating, %[[TMP_A]] : !cir.f16), !cir.float
1182+ // CIR: %[[TMP_A_F32:.*]] = cir.cast floating %[[TMP_A]] : !cir.f16 -> !cir.float
11831183// CIR: %[[A_REAL:.*]] = cir.complex.real %[[TMP_A_F32]] : !cir.float -> !cir.float
1184- // CIR: %[[TMP_A_F16:.*]] = cir.cast( floating, %[[A_REAL]] : !cir.float), !cir.f16
1184+ // CIR: %[[TMP_A_F16:.*]] = cir.cast floating %[[A_REAL]] : !cir.float -> !cir.f16
11851185// CIR: cir.store{{.*}} %[[TMP_A_F16]], %[[B_ADDR]] : !cir.f16, !cir.ptr<!cir.f16>
11861186
11871187// LLVM: %[[A_ADDR:.*]] = alloca half, i64 1, align 2
@@ -1251,7 +1251,7 @@ void real_on_scalar_from_real_with_type_promotion() {
12511251// CIR: %[[A_COMPLEX_F32:.*]] = cir.complex.create %[[A_REAL_F32]], %[[A_IMAG_F32]] : !cir.float -> !cir.complex<!cir.float>
12521252// CIR: %[[A_REAL_F32:.*]] = cir.complex.real %[[A_COMPLEX_F32]] : !cir.complex<!cir.float> -> !cir.float
12531253// CIR: %[[A_REAL:.*]] = cir.complex.real %[[A_REAL_F32]] : !cir.float -> !cir.float
1254- // CIR: %[[A_REAL_F16:.*]] = cir.cast( floating, %[[A_REAL]] : !cir.float), !cir.f16
1254+ // CIR: %[[A_REAL_F16:.*]] = cir.cast floating %[[A_REAL]] : !cir.float -> !cir.f16
12551255// CIR: cir.store{{.*}} %[[A_REAL_F16]], %[[B_ADDR]] : !cir.f16, !cir.ptr<!cir.f16>
12561256
12571257// LLVM: %[[A_ADDR:.*]] = alloca { half, half }, i64 1, align 2
@@ -1288,8 +1288,9 @@ void real_on_scalar_from_imag_with_type_promotion() {
12881288// CIR: %[[A_IMAG_F32:.*]] = cir.cast floating %[[A_IMAG]] : !cir.f16 -> !cir.float
12891289// CIR: %[[A_COMPLEX_F32:.*]] = cir.complex.create %[[A_REAL_F32]], %[[A_IMAG_F32]] : !cir.float -> !cir.complex<!cir.float>
12901290// CIR: %[[A_IMAG_F32:.*]] = cir.complex.imag %[[A_COMPLEX_F32]] : !cir.complex<!cir.float> -> !cir.float
1291- // CIR: %[[A_IMAG_F16:.*]] = cir.cast floating %[[A_IMAG_F32]] : !cir.float -> !cir.f16
1292- // CIR: cir.store{{.*}} %[[A_IMAG_F16]], %[[B_ADDR]] : !cir.f16, !cir.ptr<!cir.f16>
1291+ // CIR: %[[A_REAL_F32:.*]] = cir.complex.real %[[A_IMAG_F32]] : !cir.float -> !cir.float
1292+ // CIR: %[[A_REAL_F16:.*]] = cir.cast floating %[[A_REAL_F32]] : !cir.float -> !cir.f16
1293+ // CIR: cir.store{{.*}} %[[A_REAL_F16]], %[[B_ADDR]] : !cir.f16, !cir.ptr<!cir.f16>
12931294
12941295// LLVM: %[[A_ADDR:.*]] = alloca { half, half }, i64 1, align 2
12951296// LLVM: %[[B_ADDR]] = alloca half, i64 1, align 2
0 commit comments