@@ -1338,19 +1338,18 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
13381338 ISD::VECTOR_COMPRESS},
13391339 VT, Custom);
13401340
1341- // FIXME: mload, mstore, mgather, mscatter, vp_load/store,
1342- // vp_stride_load/store, vp_gather/scatter can be hoisted to here.
1341+ // FIXME: mload, mstore, mgather, mscatter, vp_gather/scatter can be
1342+ // hoisted to here.
13431343 setOperationAction({ISD::LOAD, ISD::STORE}, VT, Custom);
1344- setOperationAction({ISD::VP_LOAD, ISD::VP_STORE}, VT, Custom);
1344+ setOperationAction({ISD::VP_LOAD, ISD::VP_STORE,
1345+ ISD::EXPERIMENTAL_VP_STRIDED_LOAD,
1346+ ISD::EXPERIMENTAL_VP_STRIDED_STORE},
1347+ VT, Custom);
13451348
13461349 setOperationAction({ISD::FP_ROUND, ISD::FP_EXTEND}, VT, Custom);
13471350 setOperationAction({ISD::STRICT_FP_ROUND, ISD::STRICT_FP_EXTEND}, VT,
13481351 Custom);
13491352
1350- setOperationAction({ISD::EXPERIMENTAL_VP_STRIDED_LOAD,
1351- ISD::EXPERIMENTAL_VP_STRIDED_STORE},
1352- VT, Custom);
1353-
13541353 if (VT.getVectorElementType() == MVT::f16 &&
13551354 !Subtarget.hasVInstructionsF16()) {
13561355 setOperationAction(ISD::BITCAST, VT, Custom);
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