Skip to content

Commit 8e8c954

Browse files
s-barannikovs-barannikov
authored
[GISel] Erase the root instruction after emitting all its potential uses (#77494)
This tries to fix a bug by resolving a few FIXMEs. The bug is that `EraseInstAction` is emitted after emitting the _first_ `BuildMIAction`, which is too early because the erased instruction may still be used by subsequent `BuildMIAction`s (in particular, by `CopyRenderer`). An example of the bug (from `match-table-operand-types.td`): ``` def InstTest0 : GICombineRule< (defs root:$a), (match (G_MUL i32:$x, i32:$b, i32:$c), (G_MUL $a, i32:$b, i32:$x)), (apply (G_ADD i64:$tmp, $b, i32:$c), (G_ADD i8:$a, $b, i64:$tmp))>; GIR_EraseFromParent, /*InsnID*/0, GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::G_ADD), GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/0, // a GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // b GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/0, ``` Here, the root instruction is destroyed before copying its operands ('a' and 'b') to the new instruction. The solution is to emit `EraseInstAction` for the root instruction as the last action in the emission pipeline.
1 parent 8e8bbbd commit 8e8c954

22 files changed

+84
-105
lines changed

‎llvm/test/TableGen/DefaultOpsGlobalISel.td‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -53,8 +53,8 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
5353
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(1), /*SubOperand*/1, // mods1
5454
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(1), /*SubOperand*/0, // src1
5555
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
56-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
5756
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
57+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
5858
// CHECK-NEXT: // GIR_Coverage, 3,
5959
// CHECK-NEXT: GIR_Done,
6060
// CHECK-NEXT: // Label 0: @79
@@ -73,8 +73,8 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
7373
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src0
7474
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/2, // clamp
7575
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // omod
76-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
7776
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
77+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
7878
// CHECK-NEXT: // GIR_Coverage, 2,
7979
// CHECK-NEXT: GIR_Done,
8080
// CHECK-NEXT: // Label 1: @139
@@ -95,8 +95,8 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
9595
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // mods
9696
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src
9797
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
98-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
9998
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
99+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
100100
// CHECK-NEXT: // GIR_Coverage, 8,
101101
// CHECK-NEXT: GIR_Done,
102102
// CHECK-NEXT: // Label 2: @207
@@ -115,8 +115,8 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
115115
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src0
116116
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // omod
117117
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
118-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
119118
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
119+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
120120
// CHECK-NEXT: // GIR_Coverage, 5,
121121
// CHECK-NEXT: GIR_Done,
122122
// CHECK-NEXT: // Label 3: @265
@@ -141,8 +141,8 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
141141
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src0
142142
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
143143
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // clamp
144-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
145144
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
145+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
146146
// CHECK-NEXT: // GIR_Coverage, 7,
147147
// CHECK-NEXT: GIR_Done,
148148
// CHECK-NEXT: // Label 4: @345
@@ -160,8 +160,8 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
160160
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // DstI[dst]
161161
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src0
162162
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // clamp
163-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
164163
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
164+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
165165
// CHECK-NEXT: // GIR_Coverage, 0,
166166
// CHECK-NEXT: GIR_Done,
167167
// CHECK-NEXT: // Label 5: @400
@@ -180,8 +180,8 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
180180
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src0
181181
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/93,
182182
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // clamp
183-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
184183
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
184+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
185185
// CHECK-NEXT: // GIR_Coverage, 6,
186186
// CHECK-NEXT: GIR_Done,
187187
// CHECK-NEXT: // Label 6: @458
@@ -198,8 +198,8 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
198198
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // DstI[dst]
199199
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src0
200200
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
201-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
202201
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
202+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
203203
// CHECK-NEXT: // GIR_Coverage, 1,
204204
// CHECK-NEXT: GIR_Done,
205205
// CHECK-NEXT: // Label 7: @503
@@ -216,8 +216,8 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
216216
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // DstI[dst]
217217
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src0
218218
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
219-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
220219
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
220+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
221221
// CHECK-NEXT: // GIR_Coverage, 4,
222222
// CHECK-NEXT: GIR_Done,
223223
// CHECK-NEXT: // Label 8: @548

‎llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -54,8 +54,8 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
5454
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // a
5555
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5656
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // y
57-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
5857
// CHECK-NEXT: GIR_ReplaceRegWithTempReg, /*OldInsnID*/0, /*OldOpIdx*/1, /*TempRegID*/0,
58+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
5959
// CHECK-NEXT: GIR_Done,
6060
// CHECK-NEXT: // Label 3: @525
6161
// CHECK-NEXT: GIM_Reject,

‎llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,11 +39,11 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
3939
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4040
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // b
4141
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
42-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
4342
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::G_ADD),
4443
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/0, // a
4544
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // b
4645
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/0,
46+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
4747
// CHECK-NEXT: GIR_Done,
4848
// CHECK-NEXT: // Label 0: @81
4949
// CHECK-NEXT: GIM_Reject,

‎llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-permutations.td‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -196,8 +196,8 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
196196
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
197197
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
198198
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
199-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
200199
// CHECK-NEXT: GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
200+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
201201
// CHECK-NEXT: GIR_Done,
202202
// CHECK-NEXT: // Label 1: @99
203203
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 2*/ GIMT_Encode4(199), // Rule ID 6 //
@@ -239,8 +239,8 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
239239
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
240240
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
241241
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
242-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
243242
// CHECK-NEXT: GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
243+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
244244
// CHECK-NEXT: GIR_Done,
245245
// CHECK-NEXT: // Label 2: @199
246246
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 3*/ GIMT_Encode4(299), // Rule ID 5 //
@@ -282,8 +282,8 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
282282
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
283283
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
284284
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
285-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
286285
// CHECK-NEXT: GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
286+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
287287
// CHECK-NEXT: GIR_Done,
288288
// CHECK-NEXT: // Label 3: @299
289289
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 4*/ GIMT_Encode4(409), // Rule ID 4 //
@@ -329,8 +329,8 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
329329
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
330330
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
331331
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
332-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
333332
// CHECK-NEXT: GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
333+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
334334
// CHECK-NEXT: GIR_Done,
335335
// CHECK-NEXT: // Label 4: @409
336336
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 5*/ GIMT_Encode4(509), // Rule ID 3 //
@@ -372,8 +372,8 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
372372
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
373373
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
374374
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
375-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
376375
// CHECK-NEXT: GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
376+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
377377
// CHECK-NEXT: GIR_Done,
378378
// CHECK-NEXT: // Label 5: @509
379379
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 6*/ GIMT_Encode4(619), // Rule ID 2 //
@@ -419,8 +419,8 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
419419
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
420420
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
421421
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
422-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
423422
// CHECK-NEXT: GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
423+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
424424
// CHECK-NEXT: GIR_Done,
425425
// CHECK-NEXT: // Label 6: @619
426426
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 7*/ GIMT_Encode4(729), // Rule ID 1 //
@@ -466,8 +466,8 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
466466
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
467467
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
468468
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
469-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
470469
// CHECK-NEXT: GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
470+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
471471
// CHECK-NEXT: GIR_Done,
472472
// CHECK-NEXT: // Label 7: @729
473473
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 8*/ GIMT_Encode4(849), // Rule ID 0 //
@@ -517,8 +517,8 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
517517
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
518518
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
519519
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
520-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
521520
// CHECK-NEXT: GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
521+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
522522
// CHECK-NEXT: GIR_Done,
523523
// CHECK-NEXT: // Label 8: @849
524524
// CHECK-NEXT: GIM_Reject,

‎llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,11 +32,11 @@ def Test0 : GICombineRule<
3232
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::G_CONSTANT),
3333
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3434
// CHECK-NEXT: GIR_AddCImm, /*InsnID*/0, /*Type*/uint8_t(-2), /*Imm*/GIMT_Encode8(42),
35-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
3635
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::G_SUB),
3736
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/0, // dst
3837
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
3938
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/0,
39+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
4040
// CHECK-NEXT: GIR_Done,
4141
// CHECK-NEXT: // Label 0: @77
4242
// CHECK-NEXT: GIM_Reject,

‎llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -204,8 +204,8 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
204204
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // ext
205205
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // ptr
206206
// CHECK-NEXT: GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
207-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
208207
// CHECK-NEXT: GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner2),
208+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
209209
// CHECK-NEXT: GIR_Done,
210210
// CHECK-NEXT: // Label 10: @578
211211
// CHECK-NEXT: GIM_Reject,

‎llvm/test/TableGen/GlobalISelEmitter-input-discard.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,8 +24,8 @@ def FOO : I<(outs GPR32:$dst), (ins GPR32Op:$src0, GPR32Op:$src1), []>;
2424
// GISEL-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // DstI[dst]
2525
// GISEL-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
2626
// GISEL-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src1
27-
// GISEL-NEXT: GIR_EraseFromParent, /*InsnID*/0,
2827
// GISEL-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
28+
// GISEL-NEXT: GIR_EraseFromParent, /*InsnID*/0,
2929
def : Pat <
3030
(int_tgt_foo (i32 srcvalue), i32:$src1),
3131
(FOO (IMPLICIT_DEF), GPR32:$src1)

‎llvm/test/TableGen/GlobalISelEmitter-multiple-output-discard.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,5 +38,5 @@ def : Pat<(two_out GPR32:$val), (THREE_OUTS GPR32:$val)>;
3838
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // DstI[out2]
3939
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define|RegState::Dead),
4040
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // val
41-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
4241
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
42+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,

‎llvm/test/TableGen/GlobalISelEmitter-multiple-output.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -82,5 +82,5 @@ def : Pat<(two_in GPR32:$i1, GPR32:$i2), (TWO_INS GPR32:$i2, GPR32:$i1)>;
8282
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // DstI[out2]
8383
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // i2
8484
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // i1
85-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
8685
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
86+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,

‎llvm/test/TableGen/GlobalISelEmitter-nested-subregs.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -54,9 +54,9 @@ def A0 : RegisterClass<"MyTarget", [i32], 32, (add a0)>;
5454
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5555
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // DstI[dst]
5656
// CHECK-NEXT: GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0), GIMT_Encode2(MyTarget::lo16),
57-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
5857
// CHECK-NEXT: GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(MyTarget::A0wRegClassID),
5958
// CHECK-NEXT: GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, GIMT_Encode2(MyTarget::A0RegClassID),
59+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
6060
def : Pat<(i16 (anyext i8:$src)),
6161
(i16 (EXTRACT_SUBREG
6262
(i32 (INSERT_SUBREG

0 commit comments

Comments
 (0)