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AZero13RKSimon
AZero13
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RKSimon
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[X86] Try to shrink i64 compares if the input has enough sign bits (#149719)
If there are enough sign bits in a 64 bit value, we can just compare the bottom 32 bits. --------- Co-authored-by: Simon Pilgrim <[email protected]>
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+192
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‎llvm/lib/Target/X86/X86ISelLowering.cpp‎

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23486,7 +23486,6 @@ static SDValue EmitCmp(SDValue Op0, SDValue Op1, X86::CondCode X86CC,
2348623486
}
2348723487

2348823488
// Try to shrink i64 compares if the input has enough zero bits.
23489-
// TODO: Add sign-bits equivalent for isX86CCSigned(X86CC)?
2349023489
if (CmpVT == MVT::i64 && !isX86CCSigned(X86CC) &&
2349123490
Op0.hasOneUse() && // Hacky way to not break CSE opportunities with sub.
2349223491
DAG.MaskedValueIsZero(Op1, APInt::getHighBitsSet(64, 32)) &&
@@ -23496,6 +23495,16 @@ static SDValue EmitCmp(SDValue Op0, SDValue Op1, X86::CondCode X86CC,
2349623495
Op1 = DAG.getNode(ISD::TRUNCATE, dl, CmpVT, Op1);
2349723496
}
2349823497

23498+
// Try to shrink all i64 compares if the inputs are representable as signed
23499+
// i32.
23500+
if (CmpVT == MVT::i64 &&
23501+
Op0.hasOneUse() && // Hacky way to not break CSE opportunities with sub.
23502+
DAG.ComputeNumSignBits(Op1) > 32 && DAG.ComputeNumSignBits(Op0) > 32) {
23503+
CmpVT = MVT::i32;
23504+
Op0 = DAG.getNode(ISD::TRUNCATE, dl, CmpVT, Op0);
23505+
Op1 = DAG.getNode(ISD::TRUNCATE, dl, CmpVT, Op1);
23506+
}
23507+
2349923508
// 0-x == y --> x+y == 0
2350023509
// 0-x != y --> x+y != 0
2350123510
if (Op0.getOpcode() == ISD::SUB && isNullConstant(Op0.getOperand(0)) &&

‎llvm/test/CodeGen/X86/cmp.ll‎

Lines changed: 182 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -956,3 +956,185 @@ define i1 @fold_test_and_with_chain(ptr %x, ptr %y, i32 %z) {
956956
store i32 %z, ptr %y
957957
ret i1 %c
958958
}
959+
960+
define i1 @sext_mask(i32 %a) {
961+
; CHECK-LABEL: sext_mask:
962+
; CHECK: # %bb.0:
963+
; CHECK-NEXT: cmpl $-523, %edi # encoding: [0x81,0xff,0xf5,0xfd,0xff,0xff]
964+
; CHECK-NEXT: # imm = 0xFDF5
965+
; CHECK-NEXT: setl %al # encoding: [0x0f,0x9c,0xc0]
966+
; CHECK-NEXT: retq # encoding: [0xc3]
967+
%a64 = sext i32 %a to i64
968+
%v1 = icmp slt i64 %a64, -523
969+
ret i1 %v1
970+
}
971+
972+
define i1 @sext_i9_mask(i9 %a) {
973+
; NO-NDD-LABEL: sext_i9_mask:
974+
; NO-NDD: # %bb.0:
975+
; NO-NDD-NEXT: # kill: def $edi killed $edi def $rdi
976+
; NO-NDD-NEXT: shlq $55, %rdi # encoding: [0x48,0xc1,0xe7,0x37]
977+
; NO-NDD-NEXT: sarq $55, %rdi # encoding: [0x48,0xc1,0xff,0x37]
978+
; NO-NDD-NEXT: cmpl $-522, %edi # encoding: [0x81,0xff,0xf6,0xfd,0xff,0xff]
979+
; NO-NDD-NEXT: # imm = 0xFDF6
980+
; NO-NDD-NEXT: setl %al # encoding: [0x0f,0x9c,0xc0]
981+
; NO-NDD-NEXT: retq # encoding: [0xc3]
982+
;
983+
; NDD-LABEL: sext_i9_mask:
984+
; NDD: # %bb.0:
985+
; NDD-NEXT: # kill: def $edi killed $edi def $rdi
986+
; NDD-NEXT: shlq $55, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xe7,0x37]
987+
; NDD-NEXT: sarq $55, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xff,0x37]
988+
; NDD-NEXT: cmpl $-522, %edi # encoding: [0x81,0xff,0xf6,0xfd,0xff,0xff]
989+
; NDD-NEXT: # imm = 0xFDF6
990+
; NDD-NEXT: setl %al # encoding: [0x0f,0x9c,0xc0]
991+
; NDD-NEXT: retq # encoding: [0xc3]
992+
%a64 = sext i9 %a to i64
993+
%v1 = icmp slt i64 %a64, -522
994+
ret i1 %v1
995+
}
996+
997+
define i1 @sext_i32_mask(i32 %a) {
998+
; CHECK-LABEL: sext_i32_mask:
999+
; CHECK: # %bb.0:
1000+
; CHECK-NEXT: cmpl $-522, %edi # encoding: [0x81,0xff,0xf6,0xfd,0xff,0xff]
1001+
; CHECK-NEXT: # imm = 0xFDF6
1002+
; CHECK-NEXT: setl %al # encoding: [0x0f,0x9c,0xc0]
1003+
; CHECK-NEXT: retq # encoding: [0xc3]
1004+
%a64 = sext i32 %a to i64
1005+
%v1 = icmp slt i64 %a64, -522
1006+
ret i1 %v1
1007+
}
1008+
1009+
define i1 @i40(i40 %a) {
1010+
; NO-NDD-LABEL: i40:
1011+
; NO-NDD: # %bb.0:
1012+
; NO-NDD-NEXT: shlq $24, %rdi # encoding: [0x48,0xc1,0xe7,0x18]
1013+
; NO-NDD-NEXT: sarq $24, %rdi # encoding: [0x48,0xc1,0xff,0x18]
1014+
; NO-NDD-NEXT: cmpq $-521, %rdi # encoding: [0x48,0x81,0xff,0xf7,0xfd,0xff,0xff]
1015+
; NO-NDD-NEXT: # imm = 0xFDF7
1016+
; NO-NDD-NEXT: setl %al # encoding: [0x0f,0x9c,0xc0]
1017+
; NO-NDD-NEXT: retq # encoding: [0xc3]
1018+
;
1019+
; NDD-LABEL: i40:
1020+
; NDD: # %bb.0:
1021+
; NDD-NEXT: shlq $24, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xe7,0x18]
1022+
; NDD-NEXT: sarq $24, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xff,0x18]
1023+
; NDD-NEXT: cmpq $-521, %rdi # encoding: [0x48,0x81,0xff,0xf7,0xfd,0xff,0xff]
1024+
; NDD-NEXT: # imm = 0xFDF7
1025+
; NDD-NEXT: setl %al # encoding: [0x0f,0x9c,0xc0]
1026+
; NDD-NEXT: retq # encoding: [0xc3]
1027+
%a64 = sext i40 %a to i64
1028+
%v1 = icmp slt i64 %a64, -521
1029+
ret i1 %v1
1030+
}
1031+
1032+
define i1 @sext_i9_mask_sgt(i9 %a) {
1033+
; NO-NDD-LABEL: sext_i9_mask_sgt:
1034+
; NO-NDD: # %bb.0:
1035+
; NO-NDD-NEXT: # kill: def $edi killed $edi def $rdi
1036+
; NO-NDD-NEXT: shlq $55, %rdi # encoding: [0x48,0xc1,0xe7,0x37]
1037+
; NO-NDD-NEXT: sarq $55, %rdi # encoding: [0x48,0xc1,0xff,0x37]
1038+
; NO-NDD-NEXT: cmpl $-520, %edi # encoding: [0x81,0xff,0xf8,0xfd,0xff,0xff]
1039+
; NO-NDD-NEXT: # imm = 0xFDF8
1040+
; NO-NDD-NEXT: setge %al # encoding: [0x0f,0x9d,0xc0]
1041+
; NO-NDD-NEXT: retq # encoding: [0xc3]
1042+
;
1043+
; NDD-LABEL: sext_i9_mask_sgt:
1044+
; NDD: # %bb.0:
1045+
; NDD-NEXT: # kill: def $edi killed $edi def $rdi
1046+
; NDD-NEXT: shlq $55, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xe7,0x37]
1047+
; NDD-NEXT: sarq $55, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xff,0x37]
1048+
; NDD-NEXT: cmpl $-520, %edi # encoding: [0x81,0xff,0xf8,0xfd,0xff,0xff]
1049+
; NDD-NEXT: # imm = 0xFDF8
1050+
; NDD-NEXT: setge %al # encoding: [0x0f,0x9d,0xc0]
1051+
; NDD-NEXT: retq # encoding: [0xc3]
1052+
%a64 = sext i9 %a to i64
1053+
%v1 = icmp sgt i64 %a64, -521
1054+
ret i1 %v1
1055+
}
1056+
1057+
define i1 @sext_i32_mask_sgt(i32 %a) {
1058+
; CHECK-LABEL: sext_i32_mask_sgt:
1059+
; CHECK: # %bb.0:
1060+
; CHECK-NEXT: cmpl $-521, %edi # encoding: [0x81,0xff,0xf7,0xfd,0xff,0xff]
1061+
; CHECK-NEXT: # imm = 0xFDF7
1062+
; CHECK-NEXT: setge %al # encoding: [0x0f,0x9d,0xc0]
1063+
; CHECK-NEXT: retq # encoding: [0xc3]
1064+
%a64 = sext i32 %a to i64
1065+
%v1 = icmp sgt i64 %a64, -522
1066+
ret i1 %v1
1067+
}
1068+
1069+
define i1 @i40_sge(i40 %a) {
1070+
; NO-NDD-LABEL: i40_sge:
1071+
; NO-NDD: # %bb.0:
1072+
; NO-NDD-NEXT: shlq $24, %rdi # encoding: [0x48,0xc1,0xe7,0x18]
1073+
; NO-NDD-NEXT: sarq $24, %rdi # encoding: [0x48,0xc1,0xff,0x18]
1074+
; NO-NDD-NEXT: cmpq $-521, %rdi # encoding: [0x48,0x81,0xff,0xf7,0xfd,0xff,0xff]
1075+
; NO-NDD-NEXT: # imm = 0xFDF7
1076+
; NO-NDD-NEXT: setge %al # encoding: [0x0f,0x9d,0xc0]
1077+
; NO-NDD-NEXT: retq # encoding: [0xc3]
1078+
;
1079+
; NDD-LABEL: i40_sge:
1080+
; NDD: # %bb.0:
1081+
; NDD-NEXT: shlq $24, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xe7,0x18]
1082+
; NDD-NEXT: sarq $24, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xff,0x18]
1083+
; NDD-NEXT: cmpq $-521, %rdi # encoding: [0x48,0x81,0xff,0xf7,0xfd,0xff,0xff]
1084+
; NDD-NEXT: # imm = 0xFDF7
1085+
; NDD-NEXT: setge %al # encoding: [0x0f,0x9d,0xc0]
1086+
; NDD-NEXT: retq # encoding: [0xc3]
1087+
%a64 = sext i40 %a to i64
1088+
%v1 = icmp sge i64 %a64, -521
1089+
ret i1 %v1
1090+
}
1091+
1092+
define i1 @i40_eq(i40 %a) {
1093+
; NO-NDD-LABEL: i40_eq:
1094+
; NO-NDD: # %bb.0:
1095+
; NO-NDD-NEXT: movabsq $1099511627775, %rax # encoding: [0x48,0xb8,0xff,0xff,0xff,0xff,0xff,0x00,0x00,0x00]
1096+
; NO-NDD-NEXT: # imm = 0xFFFFFFFFFF
1097+
; NO-NDD-NEXT: andq %rdi, %rax # encoding: [0x48,0x21,0xf8]
1098+
; NO-NDD-NEXT: movabsq $1099511627255, %rcx # encoding: [0x48,0xb9,0xf7,0xfd,0xff,0xff,0xff,0x00,0x00,0x00]
1099+
; NO-NDD-NEXT: # imm = 0xFFFFFFFDF7
1100+
; NO-NDD-NEXT: cmpq %rcx, %rax # encoding: [0x48,0x39,0xc8]
1101+
; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
1102+
; NO-NDD-NEXT: retq # encoding: [0xc3]
1103+
;
1104+
; NDD-LABEL: i40_eq:
1105+
; NDD: # %bb.0:
1106+
; NDD-NEXT: movabsq $1099511627775, %rax # encoding: [0x48,0xb8,0xff,0xff,0xff,0xff,0xff,0x00,0x00,0x00]
1107+
; NDD-NEXT: # imm = 0xFFFFFFFFFF
1108+
; NDD-NEXT: andq %rdi, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x21,0xf8]
1109+
; NDD-NEXT: movabsq $1099511627255, %rcx # encoding: [0x48,0xb9,0xf7,0xfd,0xff,0xff,0xff,0x00,0x00,0x00]
1110+
; NDD-NEXT: # imm = 0xFFFFFFFDF7
1111+
; NDD-NEXT: cmpq %rcx, %rax # encoding: [0x48,0x39,0xc8]
1112+
; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
1113+
; NDD-NEXT: retq # encoding: [0xc3]
1114+
%a64 = sext i40 %a to i64
1115+
%v1 = icmp eq i64 %a64, -521
1116+
ret i1 %v1
1117+
}
1118+
1119+
define i1 @i40_ult(i40 %a) {
1120+
; NO-NDD-LABEL: i40_ult:
1121+
; NO-NDD: # %bb.0:
1122+
; NO-NDD-NEXT: shlq $24, %rdi # encoding: [0x48,0xc1,0xe7,0x18]
1123+
; NO-NDD-NEXT: sarq $24, %rdi # encoding: [0x48,0xc1,0xff,0x18]
1124+
; NO-NDD-NEXT: cmpq $-521, %rdi # encoding: [0x48,0x81,0xff,0xf7,0xfd,0xff,0xff]
1125+
; NO-NDD-NEXT: # imm = 0xFDF7
1126+
; NO-NDD-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
1127+
; NO-NDD-NEXT: retq # encoding: [0xc3]
1128+
;
1129+
; NDD-LABEL: i40_ult:
1130+
; NDD: # %bb.0:
1131+
; NDD-NEXT: shlq $24, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xe7,0x18]
1132+
; NDD-NEXT: sarq $24, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xff,0x18]
1133+
; NDD-NEXT: cmpq $-521, %rdi # encoding: [0x48,0x81,0xff,0xf7,0xfd,0xff,0xff]
1134+
; NDD-NEXT: # imm = 0xFDF7
1135+
; NDD-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
1136+
; NDD-NEXT: retq # encoding: [0xc3]
1137+
%a64 = sext i40 %a to i64
1138+
%v1 = icmp ult i64 %a64, -521
1139+
ret i1 %v1
1140+
}

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