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author
joaosaffran
committed
finish implementing && fix tests
1 parent e8b14bf commit 8f40e83

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5 files changed

+59
-50
lines changed

5 files changed

+59
-50
lines changed

‎llvm/lib/Target/DirectX/DXILPostOptimizationValidation.cpp‎

Lines changed: 12 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -153,23 +153,29 @@ static void reportErrors(Module &M, DXILResourceMap &DRM,
153153
RootSignatureBindingValidation Validation;
154154
Validation.addRsBindingInfo(*RSD, tripleToVisibility(MMI.ShaderProfile));
155155

156-
for (const auto &CBuf : DRM.cbuffers()) {
156+
for (const ResourceInfo &CBuf : DRM.cbuffers()) {
157157
ResourceInfo::ResourceBinding Binding = CBuf.getBinding();
158-
if (!Validation.checkCregBinding(Binding))
158+
if (!Validation.checkCRegBinding(Binding))
159159
reportRegNotBound(M, "cbuffer", Binding);
160160
}
161161

162-
for (const auto &CBuf : DRM.srvs()) {
163-
ResourceInfo::ResourceBinding Binding = CBuf.getBinding();
162+
for (const ResourceInfo &SRV : DRM.srvs()) {
163+
ResourceInfo::ResourceBinding Binding = SRV.getBinding();
164164
if (!Validation.checkTRegBinding(Binding))
165165
reportRegNotBound(M, "srv", Binding);
166166
}
167167

168-
for (const auto &CBuf : DRM.uavs()) {
169-
ResourceInfo::ResourceBinding Binding = CBuf.getBinding();
168+
for (const ResourceInfo &UAV : DRM.uavs()) {
169+
ResourceInfo::ResourceBinding Binding = UAV.getBinding();
170170
if (!Validation.checkURegBinding(Binding))
171171
reportRegNotBound(M, "uav", Binding);
172172
}
173+
174+
for (const ResourceInfo &Sampler : DRM.samplers()) {
175+
ResourceInfo::ResourceBinding Binding = Sampler.getBinding();
176+
if (!Validation.checkSamplerBinding(Binding))
177+
reportRegNotBound(M, "sampler", Binding);
178+
}
173179
}
174180
}
175181
} // namespace
@@ -199,10 +205,6 @@ void RootSignatureBindingValidation::addRsBindingInfo(
199205
RSD.ParametersContainer.getDescriptorTable(Loc);
200206

201207
for (const dxbc::RTS0::v2::DescriptorRange &Range : Table.Ranges) {
202-
if (Range.RangeType ==
203-
llvm::to_underlying(dxbc::DescriptorRangeType::Sampler))
204-
continue;
205-
206208
if (Header.ShaderVisibility ==
207209
llvm::to_underlying(dxbc::ShaderVisibility::All) ||
208210
Header.ShaderVisibility == llvm::to_underlying(Visibility))
@@ -214,29 +216,6 @@ void RootSignatureBindingValidation::addRsBindingInfo(
214216
}
215217
}
216218

217-
bool RootSignatureBindingValidation::checkCregBinding(
218-
ResourceInfo::ResourceBinding Binding) {
219-
return CRegBindingsMap.overlaps(
220-
combineUint32ToUint64(Binding.Space, Binding.LowerBound),
221-
combineUint32ToUint64(Binding.Space,
222-
Binding.LowerBound + Binding.Size - 1));
223-
}
224-
225-
bool RootSignatureBindingValidation::checkTRegBinding(
226-
ResourceInfo::ResourceBinding Binding) {
227-
return TRegBindingsMap.overlaps(
228-
combineUint32ToUint64(Binding.Space, Binding.LowerBound),
229-
combineUint32ToUint64(Binding.Space, Binding.LowerBound + Binding.Size));
230-
}
231-
232-
bool RootSignatureBindingValidation::checkURegBinding(
233-
ResourceInfo::ResourceBinding Binding) {
234-
return URegBindingsMap.overlaps(
235-
combineUint32ToUint64(Binding.Space, Binding.LowerBound),
236-
combineUint32ToUint64(Binding.Space,
237-
Binding.LowerBound + Binding.Size - 1));
238-
}
239-
240219
PreservedAnalyses
241220
DXILPostOptimizationValidation::run(Module &M, ModuleAnalysisManager &MAM) {
242221
DXILResourceMap &DRM = MAM.getResult<DXILResourceAnalysis>(M);

‎llvm/lib/Target/DirectX/DXILPostOptimizationValidation.h‎

Lines changed: 41 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -36,12 +36,13 @@ class RootSignatureBindingValidation {
3636
MapT CRegBindingsMap;
3737
MapT TRegBindingsMap;
3838
MapT URegBindingsMap;
39+
MapT SamplersBindingsMap;
3940

4041
void addRange(const dxbc::RTS0::v2::RootDescriptor &Desc, uint32_t Type) {
4142
assert((Type == llvm::to_underlying(dxbc::RootParameterType::CBV) ||
4243
Type == llvm::to_underlying(dxbc::RootParameterType::SRV) ||
4344
Type == llvm::to_underlying(dxbc::RootParameterType::UAV)) &&
44-
"Invalid Type");
45+
"Invalid Type in add Range Method");
4546

4647
llvm::dxil::ResourceInfo::ResourceBinding Binding;
4748
Binding.LowerBound = Desc.ShaderRegister;
@@ -53,19 +54,20 @@ class RootSignatureBindingValidation {
5354
uint64_t HighRange = combineUint32ToUint64(
5455
Binding.Space, Binding.LowerBound + Binding.Size - 1);
5556

57+
assert(LowRange <= HighRange && "Invalid range configuration");
58+
5659
switch (Type) {
5760

5861
case llvm::to_underlying(dxbc::RootParameterType::CBV):
5962
CRegBindingsMap.insert(LowRange, HighRange, Binding);
60-
return;
63+
break;
6164
case llvm::to_underlying(dxbc::RootParameterType::SRV):
6265
TRegBindingsMap.insert(LowRange, HighRange, Binding);
63-
return;
66+
break;
6467
case llvm::to_underlying(dxbc::RootParameterType::UAV):
6568
URegBindingsMap.insert(LowRange, HighRange, Binding);
66-
return;
69+
break;
6770
}
68-
llvm_unreachable("Invalid Type in add Range Method");
6971
}
7072

7173
void addRange(const dxbc::RTS0::v2::DescriptorRange &Range) {
@@ -80,33 +82,59 @@ class RootSignatureBindingValidation {
8082
uint64_t HighRange = combineUint32ToUint64(
8183
Binding.Space, Binding.LowerBound + Binding.Size - 1);
8284

85+
assert(LowRange <= HighRange && "Invalid range configuration");
86+
8387
switch (Range.RangeType) {
8488
case llvm::to_underlying(dxbc::DescriptorRangeType::CBV):
8589
CRegBindingsMap.insert(LowRange, HighRange, Binding);
86-
return;
90+
break;
8791
case llvm::to_underlying(dxbc::DescriptorRangeType::SRV):
8892
TRegBindingsMap.insert(LowRange, HighRange, Binding);
89-
return;
93+
break;
9094
case llvm::to_underlying(dxbc::DescriptorRangeType::UAV):
9195
URegBindingsMap.insert(LowRange, HighRange, Binding);
92-
return;
96+
break;
97+
case llvm::to_underlying(dxbc::DescriptorRangeType::Sampler):
98+
SamplersBindingsMap.insert(LowRange, HighRange, Binding);
99+
break;
93100
}
94-
llvm_unreachable("Invalid Type in add Range Method");
95101
}
96102

97103
public:
98104
RootSignatureBindingValidation()
99105
: Allocator(), CRegBindingsMap(Allocator), TRegBindingsMap(Allocator),
100-
URegBindingsMap(Allocator) {}
106+
URegBindingsMap(Allocator), SamplersBindingsMap(Allocator) {}
101107

102108
void addRsBindingInfo(mcdxbc::RootSignatureDesc &RSD,
103109
dxbc::ShaderVisibility Visibility);
104110

105-
bool checkCregBinding(dxil::ResourceInfo::ResourceBinding Binding);
111+
bool checkCRegBinding(dxil::ResourceInfo::ResourceBinding Binding) {
112+
return CRegBindingsMap.overlaps(
113+
combineUint32ToUint64(Binding.Space, Binding.LowerBound),
114+
combineUint32ToUint64(Binding.Space,
115+
Binding.LowerBound + Binding.Size - 1));
116+
}
106117

107-
bool checkTRegBinding(dxil::ResourceInfo::ResourceBinding Binding);
118+
bool checkTRegBinding(dxil::ResourceInfo::ResourceBinding Binding) {
119+
return TRegBindingsMap.overlaps(
120+
combineUint32ToUint64(Binding.Space, Binding.LowerBound),
121+
combineUint32ToUint64(Binding.Space,
122+
Binding.LowerBound + Binding.Size - 1));
123+
}
108124

109-
bool checkURegBinding(dxil::ResourceInfo::ResourceBinding Binding);
125+
bool checkURegBinding(dxil::ResourceInfo::ResourceBinding Binding) {
126+
return URegBindingsMap.overlaps(
127+
combineUint32ToUint64(Binding.Space, Binding.LowerBound),
128+
combineUint32ToUint64(Binding.Space,
129+
Binding.LowerBound + Binding.Size - 1));
130+
}
131+
132+
bool checkSamplerBinding(dxil::ResourceInfo::ResourceBinding Binding) {
133+
return SamplersBindingsMap.overlaps(
134+
combineUint32ToUint64(Binding.Space, Binding.LowerBound),
135+
combineUint32ToUint64(Binding.Space,
136+
Binding.LowerBound + Binding.Size - 1));
137+
}
110138
};
111139

112140
class DXILPostOptimizationValidation

‎llvm/lib/Target/DirectX/DXILRootSignature.cpp‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -635,8 +635,9 @@ PreservedAnalyses RootSignatureAnalysisPrinter::run(Module &M,
635635

636636
//===----------------------------------------------------------------------===//
637637
bool RootSignatureAnalysisWrapper::runOnModule(Module &M) {
638-
FuncToRsMap = std::make_unique<RootSignatureBindingInfo>(
639-
RootSignatureBindingInfo(analyzeModule(M)));
638+
if (!FuncToRsMap)
639+
FuncToRsMap = std::make_unique<RootSignatureBindingInfo>(
640+
RootSignatureBindingInfo(analyzeModule(M)));
640641
return false;
641642
}
642643

‎llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
1313
!2 = !{ ptr @main, !3, i32 1 } ; function, root signature
1414
!3 = !{ !5 } ; list of root signature elements
1515
!5 = !{ !"DescriptorTable", i32 0, !6, !7 }
16-
!6 = !{ !"Sampler", i32 0, i32 1, i32 0, i32 -1, i32 1 }
16+
!6 = !{ !"Sampler", i32 1, i32 1, i32 0, i32 -1, i32 1 }
1717
!7 = !{ !"UAV", i32 5, i32 1, i32 10, i32 5, i32 3 }
1818

1919

@@ -33,7 +33,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
3333
; DXC-NEXT: RangesOffset: 44
3434
; DXC-NEXT: Ranges:
3535
; DXC-NEXT: - RangeType: 3
36-
; DXC-NEXT: NumDescriptors: 0
36+
; DXC-NEXT: NumDescriptors: 1
3737
; DXC-NEXT: BaseShaderRegister: 1
3838
; DXC-NEXT: RegisterSpace: 0
3939
; DXC-NEXT: OffsetInDescriptorsFromTableStart: 4294967295

‎llvm/test/CodeGen/DirectX/llc-pipeline.ll‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@
3131
; CHECK-NEXT: DXIL Module Metadata analysis
3232
; CHECK-NEXT: DXIL Shader Flag Analysis
3333
; CHECK-NEXT: DXIL Translate Metadata
34+
; CHECK-NEXT: DXIL Root Signature Analysis
3435
; CHECK-NEXT: DXIL Post Optimization Validation
3536
; CHECK-NEXT: DXIL Op Lowering
3637
; CHECK-NEXT: DXIL Prepare Module

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