[AMDGPU] Renamed atomic no return baseopcode

Author: harrisonGPU

llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h

@@ -50,7 +50,7 @@ const D16ImageDimIntrinsic *lookupD16ImageDimIntrinsic(unsigned Intr);
 struct ImageDimIntrinsicInfo {
   unsigned Intr;
   unsigned BaseOpcode;
-  unsigned NoRetBaseOpcode;
+  unsigned AtomicNoRetBaseOpcode;
   MIMGDim Dim;
 
   uint8_t NumOffsetArgs;

llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

@@ -2009,10 +2009,10 @@ bool AMDGPUInstructionSelector::selectImageIntrinsic(
   unsigned IntrOpcode = Intr->BaseOpcode;
 
   // For image atomic: use no-return opcode if result is unused.
-  if (Intr->NoRetBaseOpcode != Intr->BaseOpcode) {
+  if (Intr->AtomicNoRetBaseOpcode != Intr->BaseOpcode) {
     Register ResultDef = MI.getOperand(0).getReg();
     if (MRI->use_nodbg_empty(ResultDef))
-      IntrOpcode = Intr->NoRetBaseOpcode;
+      IntrOpcode = Intr->AtomicNoRetBaseOpcode;
   }
 
   const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode =

llvm/lib/Target/AMDGPU/MIMGInstructions.td

@@ -1823,7 +1823,7 @@ let SubtargetPredicate = isGFX12Plus in {
 class ImageDimIntrinsicInfo<AMDGPUImageDimIntrinsic I> {
   Intrinsic Intr = I;
   MIMGBaseOpcode BaseOpcode = !cast<MIMGBaseOpcode>(!strconcat("IMAGE_", I.P.OpMod));
-  MIMGBaseOpcode NoRetBaseOpcode = BaseOpcode;
+  MIMGBaseOpcode AtomicNoRetBaseOpcode = BaseOpcode;
   AMDGPUDimProps Dim = I.P.Dim;
   AMDGPUImageDimIntrinsicEval DimEval = AMDGPUImageDimIntrinsicEval<I.P>;
 
@@ -1861,18 +1861,18 @@ class ImageDimIntrinsicInfo<AMDGPUImageDimIntrinsic I> {
 
 class ImageDimAtomicIntrinsicInfo<AMDGPUImageDimIntrinsic I>
   : ImageDimIntrinsicInfo<I> {
-  MIMGBaseOpcode NoRetBaseOpcode =
+  MIMGBaseOpcode AtomicNoRetBaseOpcode =
     !cast<MIMGBaseOpcode>(!strconcat("IMAGE_", I.P.OpMod, "_NORTN"));
 }
 
 def ImageDimIntrinsicTable : GenericTable {
   let FilterClass = "ImageDimIntrinsicInfo";
-  let Fields = ["Intr", "BaseOpcode", "NoRetBaseOpcode", "Dim", "NumOffsetArgs", "NumBiasArgs", "NumZCompareArgs", "NumGradients", "NumDmask", "NumData",
+  let Fields = ["Intr", "BaseOpcode", "AtomicNoRetBaseOpcode", "Dim", "NumOffsetArgs", "NumBiasArgs", "NumZCompareArgs", "NumGradients", "NumDmask", "NumData",
     "NumVAddrs", "NumArgs", "DMaskIndex", "VAddrStart", "OffsetIndex", "BiasIndex", "ZCompareIndex", "GradientStart", "CoordStart", "LodIndex", "MipIndex",
     "VAddrEnd", "RsrcIndex", "SampIndex", "UnormIndex", "TexFailCtrlIndex", "CachePolicyIndex",
     "BiasTyArg", "GradientTyArg", "CoordTyArg"];
   string TypeOf_BaseOpcode = "MIMGBaseOpcode";
-  string TypeOf_NoRetBaseOpcode = "MIMGBaseOpcode";
+  string TypeOf_AtomicNoRetBaseOpcode = "MIMGBaseOpcode";
   string TypeOf_Dim = "MIMGDim";
 
   let PrimaryKey = ["Intr"];

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

@@ -9150,9 +9150,10 @@ SDValue SITargetLowering::lowerImage(SDValue Op,
   MachineFunction &MF = DAG.getMachineFunction();
   const GCNSubtarget *ST = &MF.getSubtarget<GCNSubtarget>();
   unsigned IntrOpcode = Intr->BaseOpcode;
-  if (Intr->NoRetBaseOpcode != Intr->BaseOpcode &&
+  // For image atomic: use no-return opcode if result is unused.
+  if (Intr->AtomicNoRetBaseOpcode != Intr->BaseOpcode &&
       !Op.getNode()->hasAnyUseOfValue(0))
-    IntrOpcode = Intr->NoRetBaseOpcode;
+    IntrOpcode = Intr->AtomicNoRetBaseOpcode;
   const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode =
       AMDGPU::getMIMGBaseOpcodeInfo(IntrOpcode);
   const AMDGPU::MIMGDimInfo *DimInfo = AMDGPU::getMIMGDimInfo(Intr->Dim);