fixup! [RISCV] Handle zeroinitializer of vector tuple Type

Author: 4vtomat

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

@@ -1902,8 +1902,9 @@ SDValue SelectionDAGBuilder::getValueImpl(const Value *V) {
                  ISD::BITCAST, getCurSDLoc(), VT,
                  DAG.getNode(
                      ISD::SPLAT_VECTOR, getCurSDLoc(),
-                     MVT::getScalableVectorVT(
-                         MVT::i8, VT.getSizeInBits().getKnownMinValue() / 8),
+                     EVT::getVectorVT(*DAG.getContext(), MVT::i8,
+                                      VT.getSizeInBits().getKnownMinValue() / 8,
+                                      true),
                      DAG.getConstant(0, getCurSDLoc(), MVT::getIntegerVT(8))));
     }
 

llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

@@ -57,28 +57,6 @@ void RISCVDAGToDAGISel::PreprocessISelDAG() {
 
     SDValue Result;
     switch (N->getOpcode()) {
-    case ISD::BITCAST: {
-      MVT VT = N->getSimpleValueType(0);
-      SDLoc DL(N);
-      SDValue VL = CurDAG->getRegister(RISCV::X0, Subtarget->getXLenVT());
-      if (VT.isRISCVVectorTuple() &&
-          N->getOperand(0)->getOpcode() == ISD::SPLAT_VECTOR) {
-        unsigned NF = VT.getRISCVVectorTupleNumFields();
-        unsigned NumScalElts = VT.getSizeInBits().getKnownMinValue() / (NF * 8);
-        SDValue EltVal = CurDAG->getConstant(0, DL, Subtarget->getXLenVT());
-        MVT ScalTy =
-            MVT::getScalableVectorVT(MVT::getIntegerVT(8), NumScalElts);
-
-        SDValue Splat = CurDAG->getNode(RISCVISD::VMV_V_X_VL, DL, ScalTy,
-                                        CurDAG->getUNDEF(ScalTy), EltVal, VL);
-
-        Result = CurDAG->getUNDEF(VT);
-        for (unsigned i = 0; i < NF; ++i)
-          Result = CurDAG->getNode(RISCVISD::TUPLE_INSERT, DL, VT, Result,
-                                   Splat, CurDAG->getVectorIdxConstant(i, DL));
-      }
-      break;
-    }
     case ISD::SPLAT_VECTOR: {
       // Convert integer SPLAT_VECTOR to VMV_V_X_VL and floating-point
       // SPLAT_VECTOR to VFMV_V_F_VL to reduce isel burden.

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

@@ -18054,6 +18054,22 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
     SDValue N0 = N->getOperand(0);
     EVT VT = N->getValueType(0);
     EVT SrcVT = N0.getValueType();
+    if (VT.isRISCVVectorTuple() && N0->getOpcode() == ISD::SPLAT_VECTOR) {
+      SDValue VL = DAG.getRegister(RISCV::X0, Subtarget.getXLenVT());
+      unsigned NF = VT.getRISCVVectorTupleNumFields();
+      unsigned NumScalElts = VT.getSizeInBits().getKnownMinValue() / (NF * 8);
+      SDValue EltVal = DAG.getConstant(0, DL, Subtarget.getXLenVT());
+      MVT ScalTy = MVT::getScalableVectorVT(MVT::getIntegerVT(8), NumScalElts);
+
+      SDValue Splat = DAG.getNode(RISCVISD::VMV_V_X_VL, DL, ScalTy,
+                                  DAG.getUNDEF(ScalTy), EltVal, VL);
+
+      SDValue Result = DAG.getUNDEF(VT);
+      for (unsigned i = 0; i < NF; ++i)
+        Result = DAG.getNode(RISCVISD::TUPLE_INSERT, DL, VT, Result, Splat,
+                             DAG.getVectorIdxConstant(i, DL));
+      return Result;
+    }
     // If this is a bitcast between a MVT::v4i1/v2i1/v1i1 and an illegal integer
     // type, widen both sides to avoid a trip through memory.
     if ((SrcVT == MVT::v1i1 || SrcVT == MVT::v2i1 || SrcVT == MVT::v4i1) &&

llvm/test/CodeGen/RISCV/vector-tuple-zeroinitializer.ll

@@ -1,11 +1,11 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
+; RUN: llc -mtriple=riscv32 -mattr=+v \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
+; RUN: llc -mtriple=riscv64 -mattr=+v \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
-define target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_tuple_zero0() {
-; CHECK-LABEL: test_tuple_zero0:
+define target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_tuple_zero_power_of_2() {
+; CHECK-LABEL: test_tuple_zero_power_of_2:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
 ; CHECK-NEXT:    vmv.v.i v8, 0
@@ -15,8 +15,20 @@ entry:
   ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) zeroinitializer
 }
 
-define target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_tuple_zero1(<vscale x 4 x i32> %a) {
-; CHECK-LABEL: test_tuple_zero1:
+define target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_tuple_zero_non_power_of_2() {
+; CHECK-LABEL: test_tuple_zero_non_power_of_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
+; CHECK-NEXT:    vmv.v.i v8, 0
+; CHECK-NEXT:    vmv.v.i v10, 0
+; CHECK-NEXT:    vmv.v.i v12, 0
+; CHECK-NEXT:    ret
+entry:
+  ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) zeroinitializer
+}
+
+define target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_tuple_zero_insert1(<vscale x 4 x i32> %a) {
+; CHECK-LABEL: test_tuple_zero_insert1:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
 ; CHECK-NEXT:    vmv.v.i v10, 0
@@ -26,8 +38,8 @@ entry:
   ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %1
 }
 
-define target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_tuple_zero2(<vscale x 4 x i32> %a) {
-; CHECK-LABEL: test_tuple_zero2:
+define target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_tuple_zero_insert2(<vscale x 4 x i32> %a) {
+; CHECK-LABEL: test_tuple_zero_insert2:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
 ; CHECK-NEXT:    vmv.v.i v6, 0