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Fix formatting
Created using spr 1.3.5
1 parent 94d13aa commit 8fbfef4

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+26
-24
lines changed

1 file changed

+26
-24
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llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Lines changed: 26 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -996,23 +996,23 @@ class BinOpSameOpcodeHelper {
996996
bool hasCandidateOpcode(unsigned Opcode) const {
997997
MaskType Candidate = Mask & SeenBefore;
998998
switch (Opcode) {
999-
case Instruction::Shl:
1000-
return Candidate & ShlBIT;
1001-
case Instruction::AShr:
1002-
return Candidate & AShrBIT;
1003-
case Instruction::Mul:
1004-
return Candidate & MulBIT;
1005-
case Instruction::Add:
1006-
return Candidate & AddBIT;
1007-
case Instruction::Sub:
1008-
return Candidate & SubBIT;
1009-
case Instruction::And:
1010-
return Candidate & AndBIT;
1011-
case Instruction::Or:
1012-
return Candidate & OrBIT;
1013-
case Instruction::Xor:
1014-
return Candidate & XorBIT;
1015-
default:
999+
case Instruction::Shl:
1000+
return Candidate & ShlBIT;
1001+
case Instruction::AShr:
1002+
return Candidate & AShrBIT;
1003+
case Instruction::Mul:
1004+
return Candidate & MulBIT;
1005+
case Instruction::Add:
1006+
return Candidate & AddBIT;
1007+
case Instruction::Sub:
1008+
return Candidate & SubBIT;
1009+
case Instruction::And:
1010+
return Candidate & AndBIT;
1011+
case Instruction::Or:
1012+
return Candidate & OrBIT;
1013+
case Instruction::Xor:
1014+
return Candidate & XorBIT;
1015+
default:
10161016
break;
10171017
}
10181018
llvm_unreachable("Cannot find interchangeable instruction.");
@@ -5052,9 +5052,7 @@ class BoUpSLP {
50525052
const ScheduleBundle &getBundle() const { return Bundle; }
50535053

50545054
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
5055-
void dump(raw_ostream &OS) const {
5056-
OS << "[Copyable]" << *getInst();
5057-
}
5055+
void dump(raw_ostream &OS) const { OS << "[Copyable]" << *getInst(); }
50585056

50595057
LLVM_DUMP_METHOD void dump() const {
50605058
dump(dbgs());
@@ -5306,13 +5304,16 @@ class BoUpSLP {
53065304
.try_emplace(std::make_pair(std::make_pair(In, EI.EdgeIdx), I))
53075305
.first->getSecond()
53085306
.push_back(CD);
5309-
ScheduleCopyableDataMapByUsers.try_emplace(I).first->getSecond().insert(CD);
5307+
ScheduleCopyableDataMapByUsers.try_emplace(I)
5308+
.first->getSecond()
5309+
.insert(CD);
53105310
// Remove extra deps for users, becoming non-immediate users of the
53115311
// instruction. It may happen, if the chain of same copyable elements
53125312
// appears in the tree.
53135313
if (In == I) {
53145314
EdgeInfo UserEI = EI.UserTE->UserTreeIndex;
5315-
if (ScheduleCopyableData *UserCD = getScheduleCopyableData(UserEI, In))
5315+
if (ScheduleCopyableData *UserCD =
5316+
getScheduleCopyableData(UserEI, In))
53165317
ScheduleCopyableDataMapByUsers[I].remove(UserCD);
53175318
}
53185319
It = find(make_range(std::next(It), Op.end()), I);
@@ -5417,7 +5418,8 @@ class BoUpSLP {
54175418
++OperandsUses[I];
54185419
}
54195420
}
5420-
// Decrement the unscheduled counter and insert to ready list if ready.
5421+
// Decrement the unscheduled counter and insert to ready list if
5422+
// ready.
54215423
auto DecrUnschedForInst = [&](Instruction *I, TreeEntry *UserTE,
54225424
unsigned OpIdx) {
54235425
const EdgeInfo EI = {UserTE, OpIdx};
@@ -10709,7 +10711,7 @@ class InstructionsCompatibilityAnalysis {
1070910711
S = InstructionsState(MainOp, MainOp, /*HasCopyables=*/true);
1071010712
if (!WithProfitabilityCheck)
1071110713
return S;
10712-
// Check if it is profitable to vectorize the instruction.
10714+
// Check if it is profitable to vectorize the instruction.
1071310715
SmallVector<BoUpSLP::ValueList> Operands = buildOperands(S, VL);
1071410716
if (VL.size() == 2) {
1071510717
// Check if the operands allow better vectorization.

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