Skip to content

Commit 911f763

Browse files
eugeneepshteyneugeneepshteyn
authored
Merge branch 'llvm:main' into cfi-show
2 parents fda6d3f + c0f84d3 commit 911f763

File tree

474 files changed

+13224
-3510
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

474 files changed

+13224
-3510
lines changed

‎bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp‎

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2517,10 +2517,8 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
25172517
createInstrIncMemory(const MCSymbol *Target, MCContext *Ctx, bool IsLeaf,
25182518
unsigned CodePointerSize) const override {
25192519
unsigned int I = 0;
2520-
InstructionListType Instrs(IsLeaf ? 12 : 10);
2520+
InstructionListType Instrs(10);
25212521

2522-
if (IsLeaf)
2523-
createStackPointerIncrement(Instrs[I++], 128);
25242522
createPushRegisters(Instrs[I++], AArch64::X0, AArch64::X1);
25252523
getSystemFlag(Instrs[I++], AArch64::X1);
25262524
InstructionListType Addr = materializeAddress(Target, Ctx, AArch64::X0);
@@ -2535,8 +2533,6 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
25352533
loadReg(Instrs[I++], AArch64::X2, AArch64::SP);
25362534
setSystemFlag(Instrs[I++], AArch64::X1);
25372535
createPopRegisters(Instrs[I++], AArch64::X0, AArch64::X1);
2538-
if (IsLeaf)
2539-
createStackPointerDecrement(Instrs[I++], 128);
25402536
return Instrs;
25412537
}
25422538

‎clang-tools-extra/test/clang-tidy/check_clang_tidy.py‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -391,9 +391,7 @@ def parse_arguments() -> Tuple[argparse.Namespace, List[str]]:
391391
args, extra_args = parser.parse_known_args()
392392
if args.std is None:
393393
_, extension = os.path.splitext(args.assume_filename or args.input_file_name)
394-
args.std = [
395-
"c++11-or-later" if extension in [".cpp", ".hpp", ".mm"] else "c99-or-later"
396-
]
394+
args.std = ["c99-or-later" if extension in [".c", ".m"] else "c++11-or-later"]
397395

398396
return (args, extra_args)
399397

‎clang/docs/ReleaseNotes.rst‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -219,6 +219,7 @@ Deprecated Compiler Flags
219219

220220
Modified Compiler Flags
221221
-----------------------
222+
- The `-gkey-instructions` compiler flag is now enabled by default when DWARF is emitted for plain C/C++ and optimizations are enabled. (#GH149509)
222223

223224
Removed Compiler Flags
224225
-------------------------

‎clang/include/clang/Basic/BuiltinsAMDGPU.def‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -835,5 +835,15 @@ TARGET_BUILTIN(__builtin_amdgcn_swmmac_i32_16x16x128_iu8, "V8iIbV8iIbV16iV8iiIbI
835835
TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x64_f16, "V8fIbV16hIbV32hV8fiIbIb", "nc", "gfx1250-insts,wavefrontsize32")
836836
TARGET_BUILTIN(__builtin_amdgcn_swmmac_f16_16x16x64_f16, "V8hIbV16hIbV32hV8hiIbIb", "nc", "gfx1250-insts,wavefrontsize32")
837837

838+
// GFX12.5 128B cooperative atomics
839+
TARGET_BUILTIN(__builtin_amdgcn_cooperative_atomic_load_32x4B, "ii*IicC*", "nc", "gfx1250-insts,wavefrontsize32")
840+
TARGET_BUILTIN(__builtin_amdgcn_cooperative_atomic_store_32x4B, "vi*iIicC*", "nc", "gfx1250-insts,wavefrontsize32")
841+
842+
TARGET_BUILTIN(__builtin_amdgcn_cooperative_atomic_load_16x8B, "V2iV2i*IicC*", "nc", "gfx1250-insts,wavefrontsize32")
843+
TARGET_BUILTIN(__builtin_amdgcn_cooperative_atomic_store_16x8B, "vV2i*V2iIicC*", "nc", "gfx1250-insts,wavefrontsize32")
844+
845+
TARGET_BUILTIN(__builtin_amdgcn_cooperative_atomic_load_8x16B, "V4iV4i*IicC*", "nc", "gfx1250-insts,wavefrontsize32")
846+
TARGET_BUILTIN(__builtin_amdgcn_cooperative_atomic_store_8x16B, "vV4i*V4iIicC*", "nc", "gfx1250-insts,wavefrontsize32")
847+
838848
#undef BUILTIN
839849
#undef TARGET_BUILTIN

‎clang/include/clang/Basic/DiagnosticSemaKinds.td‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13609,4 +13609,6 @@ def warn_acc_var_referenced_lacks_op
1360913609
// AMDGCN builtins diagnostics
1361013610
def err_amdgcn_load_lds_size_invalid_value : Error<"invalid size value">;
1361113611
def note_amdgcn_load_lds_size_valid_value : Note<"size must be %select{1, 2, or 4|1, 2, 4, 12 or 16}0">;
13612+
13613+
def err_amdgcn_coop_atomic_invalid_as : Error<"cooperative atomic requires a global or generic pointer">;
1361213614
} // end of sema component.

‎clang/include/clang/Basic/arm_sve.td‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1828,7 +1828,7 @@ let SVETargetGuard = "sve2,lut", SMETargetGuard = "sme2,lut" in {
18281828
////////////////////////////////////////////////////////////////////////////////
18291829
// SVE2 - Optional
18301830

1831-
let SVETargetGuard = "sve2,sve-aes", SMETargetGuard = "ssve-aes" in {
1831+
let SVETargetGuard = "sve-aes", SMETargetGuard = "ssve-aes" in {
18321832
def SVAESD : SInst<"svaesd[_{d}]", "ddd", "Uc", MergeNone, "aarch64_sve_aesd", [IsOverloadNone, VerifyRuntimeMode]>;
18331833
def SVAESIMC : SInst<"svaesimc[_{d}]", "dd", "Uc", MergeNone, "aarch64_sve_aesimc", [IsOverloadNone, VerifyRuntimeMode]>;
18341834
def SVAESE : SInst<"svaese[_{d}]", "ddd", "Uc", MergeNone, "aarch64_sve_aese", [IsOverloadNone, VerifyRuntimeMode]>;
@@ -1845,12 +1845,12 @@ let SVETargetGuard = "sve-sha3", SMETargetGuard = "sve-sha3,sme2p1" in {
18451845
def SVRAX1 : SInst<"svrax1[_{d}]", "ddd", "lUl", MergeNone, "aarch64_sve_rax1", [IsOverloadNone, VerifyRuntimeMode]>;
18461846
}
18471847

1848-
let SVETargetGuard = "sve2-sm4", SMETargetGuard = InvalidMode in {
1848+
let SVETargetGuard = "sve-sm4", SMETargetGuard = InvalidMode in {
18491849
def SVSM4E : SInst<"svsm4e[_{d}]", "ddd", "Ui", MergeNone, "aarch64_sve_sm4e", [IsOverloadNone]>;
18501850
def SVSM4EKEY : SInst<"svsm4ekey[_{d}]", "ddd", "Ui", MergeNone, "aarch64_sve_sm4ekey", [IsOverloadNone]>;
18511851
}
18521852

1853-
let SVETargetGuard = "sve2,sve-bitperm", SMETargetGuard = "ssve-bitperm" in {
1853+
let SVETargetGuard = "sve-bitperm", SMETargetGuard = "ssve-bitperm" in {
18541854
def SVBDEP : SInst<"svbdep[_{d}]", "ddd", "UcUsUiUl", MergeNone, "aarch64_sve_bdep_x", [VerifyRuntimeMode]>;
18551855
def SVBDEP_N : SInst<"svbdep[_n_{d}]", "dda", "UcUsUiUl", MergeNone, "aarch64_sve_bdep_x", [VerifyRuntimeMode]>;
18561856
def SVBEXT : SInst<"svbext[_{d}]", "ddd", "UcUsUiUl", MergeNone, "aarch64_sve_bext_x", [VerifyRuntimeMode]>;
@@ -1979,7 +1979,7 @@ let SVETargetGuard = "sve2p1", SMETargetGuard = "sme2" in {
19791979
def SVPFALSE_COUNT_ALIAS : SInst<"svpfalse_c", "}v", "", MergeNone, "", [IsOverloadNone, VerifyRuntimeMode]>;
19801980
}
19811981

1982-
let SVETargetGuard = "sve2,sve-b16b16", SMETargetGuard = "sme2,sve-b16b16" in {
1982+
let SVETargetGuard = "sve-b16b16", SMETargetGuard = "sme2,sve-b16b16" in {
19831983
defm SVMUL_BF : SInstZPZZ<"svmul", "b", "aarch64_sve_fmul", "aarch64_sve_fmul_u", [VerifyRuntimeMode]>;
19841984
defm SVADD_BF : SInstZPZZ<"svadd", "b", "aarch64_sve_fadd", "aarch64_sve_fadd_u", [VerifyRuntimeMode]>;
19851985
defm SVSUB_BF : SInstZPZZ<"svsub", "b", "aarch64_sve_fsub", "aarch64_sve_fsub_u", [VerifyRuntimeMode]>;

‎clang/include/clang/CIR/Dialect/IR/CIRDataLayout.h‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,18 @@ class CIRDataLayout {
6868
return llvm::alignTo(getTypeStoreSize(ty), getABITypeAlign(ty).value());
6969
}
7070

71+
/// Returns the offset in bits between successive objects of the
72+
/// specified type, including alignment padding; always a multiple of 8.
73+
///
74+
/// If Ty is a scalable vector type, the scalable property will be set and
75+
/// the runtime size will be a positive integer multiple of the base size.
76+
///
77+
/// This is the amount that alloca reserves for this type. For example,
78+
/// returns 96 or 128 for x86_fp80, depending on alignment.
79+
llvm::TypeSize getTypeAllocSizeInBits(mlir::Type ty) const {
80+
return 8 * getTypeAllocSize(ty);
81+
}
82+
7183
llvm::TypeSize getTypeSizeInBits(mlir::Type ty) const;
7284
};
7385

‎clang/include/clang/CIR/MissingFeatures.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -146,7 +146,6 @@ struct MissingFeatures {
146146
static bool cxxabiUseARMMethodPtrABI() { return false; }
147147
static bool cxxabiUseARMGuardVarABI() { return false; }
148148
static bool cxxabiAppleARM64CXXABI() { return false; }
149-
static bool isDiscreteBitFieldABI() { return false; }
150149

151150
// Address class
152151
static bool addressOffset() { return false; }

‎clang/include/clang/Sema/Sema.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5363,7 +5363,7 @@ class Sema final : public SemaBase {
53635363
SourceLocation UsingLoc,
53645364
SourceLocation EnumLoc, SourceRange TyLoc,
53655365
const IdentifierInfo &II, ParsedType Ty,
5366-
CXXScopeSpec *SS = nullptr);
5366+
const CXXScopeSpec &SS);
53675367
Decl *ActOnAliasDeclaration(Scope *CurScope, AccessSpecifier AS,
53685368
MultiTemplateParamsArg TemplateParams,
53695369
SourceLocation UsingLoc, UnqualifiedId &Name,

‎clang/include/clang/Sema/SemaAMDGPU.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,8 @@ class SemaAMDGPU : public SemaBase {
2626

2727
bool CheckAMDGCNBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall);
2828

29+
bool checkCoopAtomicFunctionCall(CallExpr *TheCall, bool IsStore);
30+
2931
bool checkMovDPPFunctionCall(CallExpr *TheCall, unsigned NumArgs,
3032
unsigned NumDataArgs);
3133

0 commit comments

Comments
 (0)