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[HLSL][SPIRV] Add HLSL type translation for spirv.
This commit partially implements SPIRTargetCodeGenInfo::getHLSLType. It can now generate the spirv type for the following HLSL types: 1. RWBuffer 2. Buffer 3. Sampler
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+125
-27
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2 files changed

+125
-27
lines changed

‎clang/lib/CodeGen/Targets/SPIR.cpp‎

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,10 @@ class CommonSPIRTargetCodeGenInfo : public TargetCodeGenInfo {
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5353
unsigned getOpenCLKernelCallingConv() const override;
5454
llvm::Type *getOpenCLType(CodeGenModule &CGM, const Type *T) const override;
55+
llvm::Type *getHLSLType(CodeGenModule &CGM, const Type *Ty) const override;
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llvm::Type *getSPIRVImageTypeFromHLSLResource(
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const HLSLAttributedResourceType::Attributes &attributes,
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llvm::Type *ElementType, llvm::LLVMContext &Ctx) const;
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};
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class SPIRVTargetCodeGenInfo : public CommonSPIRTargetCodeGenInfo {
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public:
@@ -323,6 +327,83 @@ llvm::Type *CommonSPIRTargetCodeGenInfo::getOpenCLType(CodeGenModule &CGM,
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return nullptr;
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}
325329

330+
llvm::Type *CommonSPIRTargetCodeGenInfo::getHLSLType(CodeGenModule &CGM,
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const Type *Ty) const {
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auto *ResType = dyn_cast<HLSLAttributedResourceType>(Ty);
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if (!ResType)
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return nullptr;
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llvm::LLVMContext &Ctx = CGM.getLLVMContext();
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const HLSLAttributedResourceType::Attributes &ResAttrs = ResType->getAttrs();
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switch (ResAttrs.ResourceClass) {
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case llvm::dxil::ResourceClass::UAV:
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case llvm::dxil::ResourceClass::SRV: {
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// TypedBuffer and RawBuffer both need element type
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QualType ContainedTy = ResType->getContainedType();
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if (ContainedTy.isNull())
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return nullptr;
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assert(!ResAttrs.RawBuffer &&
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"Raw buffers handles are not implemented for SPIR-V yet");
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assert(!ResAttrs.IsROV &&
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"Rasterizer order views not implemented for SPIR-V yet");
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// convert element type
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llvm::Type *ElemType = CGM.getTypes().ConvertType(ContainedTy);
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return getSPIRVImageTypeFromHLSLResource(ResAttrs, ElemType, Ctx);
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}
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case llvm::dxil::ResourceClass::CBuffer:
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llvm_unreachable("CBuffer handles are not implemented for SPIR-V yet");
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break;
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case llvm::dxil::ResourceClass::Sampler:
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return llvm::TargetExtType::get(Ctx, "spirv.Sampler");
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}
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return nullptr;
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}
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llvm::Type *CommonSPIRTargetCodeGenInfo::getSPIRVImageTypeFromHLSLResource(
365+
const HLSLAttributedResourceType::Attributes &attributes,
366+
llvm::Type *ElementType, llvm::LLVMContext &Ctx) const {
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if (ElementType->isVectorTy()) {
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ElementType = ElementType->getScalarType();
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}
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if (!ElementType->isIntegerTy() && !ElementType->isFloatingPointTy()) {
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// TODO: Should there be an error message?
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ElementType->dump();
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assert(false && "Bad element type");
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return nullptr;
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}
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// For HLSL types, the depth is always 2.
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SmallVector<unsigned, 6> IntParams = {0, 2, 0, 0, 1, 0};
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// Dim
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// For now we assume everything is a buffer.
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IntParams[0] = 5;
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// Depth
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// HLSL does not indicate if it is a depth texture or not, so we use unknown.
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IntParams[1] = 2;
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// Arrayed
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IntParams[2] = 0;
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// MS
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IntParams[3] = 0;
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// Sampled
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IntParams[4] =
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attributes.ResourceClass == llvm::dxil::ResourceClass::UAV ? 2 : 1;
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// Image format.
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// Setting to unknown for now.
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IntParams[5] = 0;
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return llvm::TargetExtType::get(Ctx, "spirv.Image", {ElementType}, IntParams);
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}
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std::unique_ptr<TargetCodeGenInfo>
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CodeGen::createCommonSPIRTargetCodeGenInfo(CodeGenModule &CGM) {
328409
return std::make_unique<CommonSPIRTargetCodeGenInfo>(CGM.getTypes());

‎clang/test/CodeGenHLSL/builtins/RWBuffer-elementtype.hlsl‎

Lines changed: 44 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -1,22 +1,39 @@
1-
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.2-compute -finclude-default-header -fnative-half-type -emit-llvm -o - %s | FileCheck %s
1+
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.2-compute -finclude-default-header -fnative-half-type -emit-llvm -o - %s | FileCheck %s -check-prefixes=DXIL,COMMON
2+
// RUN: %clang_cc1 -triple spirv-pc-vulkan-compute -finclude-default-header -fnative-half-type -emit-llvm -o - %s | FileCheck %s -check-prefixes=SPIRV,COMMON
23

34
// NOTE: The type name number and whether the struct is packed or not will mostly
45
// likely change once subscript operators are properly implemented (llvm/llvm-project#95956)
56
// and theinterim field of the contained type is removed.
67

7-
// CHECK: %"class.hlsl::RWBuffer" = type <{ target("dx.TypedBuffer", i16, 1, 0, 1)
8-
// CHECK: %"class.hlsl::RWBuffer.0" = type <{ target("dx.TypedBuffer", i16, 1, 0, 0)
9-
// CHECK: %"class.hlsl::RWBuffer.2" = type { target("dx.TypedBuffer", i32, 1, 0, 1)
10-
// CHECK: %"class.hlsl::RWBuffer.3" = type { target("dx.TypedBuffer", i32, 1, 0, 0)
11-
// CHECK: %"class.hlsl::RWBuffer.4" = type { target("dx.TypedBuffer", i64, 1, 0, 1)
12-
// CHECK: %"class.hlsl::RWBuffer.5" = type { target("dx.TypedBuffer", i64, 1, 0, 0)
13-
// CHECK: %"class.hlsl::RWBuffer.6" = type <{ target("dx.TypedBuffer", half, 1, 0, 0)
14-
// CHECK: %"class.hlsl::RWBuffer.8" = type { target("dx.TypedBuffer", float, 1, 0, 0)
15-
// CHECK: %"class.hlsl::RWBuffer.9" = type { target("dx.TypedBuffer", double, 1, 0, 0)
16-
// CHECK: %"class.hlsl::RWBuffer.10" = type { target("dx.TypedBuffer", <4 x i16>, 1, 0, 0)
17-
// CHECK: %"class.hlsl::RWBuffer.11" = type { target("dx.TypedBuffer", <3 x i32>, 1, 0, 0)
18-
// CHECK: %"class.hlsl::RWBuffer.12" = type { target("dx.TypedBuffer", <2 x half>, 1, 0, 0)
19-
// CHECK: %"class.hlsl::RWBuffer.13" = type { target("dx.TypedBuffer", <3 x float>, 1, 0, 0)
8+
// DXIL: %"class.hlsl::RWBuffer" = type <{ target("dx.TypedBuffer", i16, 1, 0, 1)
9+
// DXIL: %"class.hlsl::RWBuffer.0" = type <{ target("dx.TypedBuffer", i16, 1, 0, 0)
10+
// DXIL: %"class.hlsl::RWBuffer.2" = type { target("dx.TypedBuffer", i32, 1, 0, 1)
11+
// DXIL: %"class.hlsl::RWBuffer.3" = type { target("dx.TypedBuffer", i32, 1, 0, 0)
12+
// DXIL: %"class.hlsl::RWBuffer.4" = type { target("dx.TypedBuffer", i64, 1, 0, 1)
13+
// DXIL: %"class.hlsl::RWBuffer.5" = type { target("dx.TypedBuffer", i64, 1, 0, 0)
14+
// DXIL: %"class.hlsl::RWBuffer.6" = type <{ target("dx.TypedBuffer", half, 1, 0, 0)
15+
// DXIL: %"class.hlsl::RWBuffer.8" = type { target("dx.TypedBuffer", float, 1, 0, 0)
16+
// DXIL: %"class.hlsl::RWBuffer.9" = type { target("dx.TypedBuffer", double, 1, 0, 0)
17+
// DXIL: %"class.hlsl::RWBuffer.10" = type { target("dx.TypedBuffer", <4 x i16>, 1, 0, 0)
18+
// DXIL: %"class.hlsl::RWBuffer.11" = type { target("dx.TypedBuffer", <3 x i32>, 1, 0, 0)
19+
// DXIL: %"class.hlsl::RWBuffer.12" = type { target("dx.TypedBuffer", <2 x half>, 1, 0, 0)
20+
// DXIL: %"class.hlsl::RWBuffer.13" = type { target("dx.TypedBuffer", <3 x float>, 1, 0, 0)
21+
22+
// SPIRV: %"class.hlsl::RWBuffer" = type <{ target("spirv.Image", i16, 5, 2, 0, 0, 2, 0), i16, [6 x i8] }>
23+
// SPIRV: %"class.hlsl::RWBuffer.0" = type <{ target("spirv.Image", i16, 5, 2, 0, 0, 2, 0), i16, [6 x i8] }>
24+
// SPIRV: %"class.hlsl::RWBuffer.2" = type <{ target("spirv.Image", i32, 5, 2, 0, 0, 2, 0), i32, [4 x i8] }>
25+
// SPIRV: %"class.hlsl::RWBuffer.4" = type <{ target("spirv.Image", i32, 5, 2, 0, 0, 2, 0), i32, [4 x i8] }>
26+
// SPIRV: %"class.hlsl::RWBuffer.6" = type { target("spirv.Image", i64, 5, 2, 0, 0, 2, 0), i64 }
27+
// SPIRV: %"class.hlsl::RWBuffer.7" = type { target("spirv.Image", i64, 5, 2, 0, 0, 2, 0), i64 }
28+
// SPIRV: %"class.hlsl::RWBuffer.8" = type <{ target("spirv.Image", half, 5, 2, 0, 0, 2, 0), half, [6 x i8] }>
29+
// SPIRV: %"class.hlsl::RWBuffer.10" = type <{ target("spirv.Image", float, 5, 2, 0, 0, 2, 0), float, [4 x i8] }>
30+
// SPIRV: %"class.hlsl::RWBuffer.12" = type { target("spirv.Image", double, 5, 2, 0, 0, 2, 0), double }
31+
// SPIRV: %"class.hlsl::RWBuffer.13" = type { target("spirv.Image", i16, 5, 2, 0, 0, 2, 0), <4 x i16> }
32+
// SPIRV: %"class.hlsl::RWBuffer.14" = type { target("spirv.Image", i32, 5, 2, 0, 0, 2, 0), <3 x i32> }
33+
// SPIRV: %"class.hlsl::RWBuffer.15" = type <{ target("spirv.Image", half, 5, 2, 0, 0, 2, 0), <2 x half>, [4 x i8] }>
34+
// SPIRV: %"class.hlsl::RWBuffer.17" = type { target("spirv.Image", float, 5, 2, 0, 0, 2, 0), <3 x float> }
35+
36+
2037

2138
RWBuffer<int16_t> BufI16;
2239
RWBuffer<uint16_t> BufU16;
@@ -55,16 +72,16 @@ void main(int GI : SV_GroupIndex) {
5572
BufF32x3[GI] = 0;
5673
}
5774

58-
// CHECK: !{{[0-9]+}} = !{ptr @BufI16, i32 10, i32 2,
59-
// CHECK: !{{[0-9]+}} = !{ptr @BufU16, i32 10, i32 3,
60-
// CHECK: !{{[0-9]+}} = !{ptr @BufI32, i32 10, i32 4,
61-
// CHECK: !{{[0-9]+}} = !{ptr @BufU32, i32 10, i32 5,
62-
// CHECK: !{{[0-9]+}} = !{ptr @BufI64, i32 10, i32 6,
63-
// CHECK: !{{[0-9]+}} = !{ptr @BufU64, i32 10, i32 7,
64-
// CHECK: !{{[0-9]+}} = !{ptr @BufF16, i32 10, i32 8,
65-
// CHECK: !{{[0-9]+}} = !{ptr @BufF32, i32 10, i32 9,
66-
// CHECK: !{{[0-9]+}} = !{ptr @BufF64, i32 10, i32 10,
67-
// CHECK: !{{[0-9]+}} = !{ptr @BufI16x4, i32 10, i32 2,
68-
// CHECK: !{{[0-9]+}} = !{ptr @BufU32x3, i32 10, i32 5,
69-
// CHECK: !{{[0-9]+}} = !{ptr @BufF16x2, i32 10, i32 8,
70-
// CHECK: !{{[0-9]+}} = !{ptr @BufF32x3, i32 10, i32 9,
75+
// COMMON: !{{[0-9]+}} = !{ptr @BufI16, i32 10, i32 2,
76+
// COMMON: !{{[0-9]+}} = !{ptr @BufU16, i32 10, i32 3,
77+
// COMMON: !{{[0-9]+}} = !{ptr @BufI32, i32 10, i32 4,
78+
// COMMON: !{{[0-9]+}} = !{ptr @BufU32, i32 10, i32 5,
79+
// COMMON: !{{[0-9]+}} = !{ptr @BufI64, i32 10, i32 6,
80+
// COMMON: !{{[0-9]+}} = !{ptr @BufU64, i32 10, i32 7,
81+
// COMMON: !{{[0-9]+}} = !{ptr @BufF16, i32 10, i32 8,
82+
// COMMON: !{{[0-9]+}} = !{ptr @BufF32, i32 10, i32 9,
83+
// COMMON: !{{[0-9]+}} = !{ptr @BufF64, i32 10, i32 10,
84+
// COMMON: !{{[0-9]+}} = !{ptr @BufI16x4, i32 10, i32 2,
85+
// COMMON: !{{[0-9]+}} = !{ptr @BufU32x3, i32 10, i32 5,
86+
// COMMON: !{{[0-9]+}} = !{ptr @BufF16x2, i32 10, i32 8,
87+
// COMMON: !{{[0-9]+}} = !{ptr @BufF32x3, i32 10, i32 9,

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