[AMDGPU][Docs] DWARF aspace-aware base types (post-review fixes)

Author: slinder1

llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst

@@ -3807,7 +3807,7 @@ A.5.1 Base Type Entries
 2. A ``DW_TAG_base_type`` debugger information entry with the encoding
    ``DW_ATE_address`` may have a ``DW_AT_LLVM_address_space`` attribute whose
    value is an architecture specific address space (see
-   :ref:`amdgpu-dwarf-address-spaces`). If ommitted it defaults to
+   :ref:`amdgpu-dwarf-address-spaces`). If omitted it defaults to
    ``DW_ASPACE_LLVM_none``.
 
 .. _amdgpu-dwarf-type-modifier-entries:

llvm/docs/AMDGPUUsage.rst

@@ -2938,13 +2938,15 @@ error.
   or from that address space is always an evaluation error.
 
   For targets which support the generic address space, converting from
-  ``DW_ASPACE_AMDGPU_generic`` to ``DW_ASPACE_LLVM_none`` is always defined and
-  requires no change to the literal value of the address.
+  ``DW_ASPACE_AMDGPU_generic`` to ``DW_ASPACE_LLVM_none`` is defined when the
+  generic address is in the global address space. The conversion requires no
+  change to the literal value of the address.
 
   Converting from ``DW_ASPACE_AMDGPU_generic`` to any of
   ``DW_ASPACE_AMDGPU_local``, ``DW_ASPACE_AMDGPU_private_wave`` or
   ``DW_ASPACE_AMDGPU_private_lane`` is defined when the relevant hardware
-  support is present and setup has been completed. Conversion to
+  support is present, any required hardware setup has been completed, and the
+  generic address is in the corresponding address space. Conversion to
   ``DW_ASPACE_AMDGPU_private_lane`` additionally requires the context to
   include the active lane.