Update ARMISelLowering.cpp

Author: AZero13

llvm/lib/Target/ARM/ARMISelLowering.cpp

@@ -20175,53 +20175,30 @@ static bool optimizeLogicalImm(SDValue Op, unsigned Imm, const APInt &Demanded,
   // Clear bits that are not demanded.
   Imm &= DemandedBits;
 
-  while (true) {
-    // The goal here is to set the non-demanded bits in a way that minimizes
-    // the number of switching between 0 and 1. In order to achieve this goal,
-    // we set the non-demanded bits to the value of the preceding demanded bits.
-    // For example, if we have an immediate 0bx10xx0x1 ('x' indicates a
-    // non-demanded bit), we copy bit0 (1) to the least significant 'x',
-    // bit2 (0) to 'xx', and bit6 (1) to the most significant 'x'.
-    // The final result is 0b11000011.
-    unsigned NonDemandedBits = ~DemandedBits;
-    unsigned InvertedImm = ~Imm & DemandedBits;
-    unsigned RotatedImm =
-        ((InvertedImm << 1) | (InvertedImm >> (EltSize - 1) & 1)) &
-        NonDemandedBits;
-    unsigned Sum = RotatedImm + NonDemandedBits;
-    bool Carry = NonDemandedBits & ~Sum & (1ULL << (EltSize - 1));
-    unsigned Ones = (Sum + Carry) & NonDemandedBits;
-    NewImm = (Imm | Ones) & Mask;
-
-    // If NewImm or its bitwise NOT is a shifted mask, it is a bitmask immediate
-    // or all-ones or all-zeros, in which case we can stop searching. Otherwise,
-    // we halve the element size and continue the search.
-    if (isShiftedMask_32(NewImm) || isShiftedMask_32(~(NewImm | ~Mask)))
-      break;
-
-    // We cannot shrink the element size any further if it is 2-bits.
-    if (EltSize == 2)
-      return false;
-
-    EltSize /= 2;
-    Mask >>= EltSize;
-    unsigned Hi = Imm >> EltSize, DemandedBitsHi = DemandedBits >> EltSize;
-
-    // Return if there is mismatch in any of the demanded bits of Imm and Hi.
-    if (((Imm ^ Hi) & (DemandedBits & DemandedBitsHi) & Mask) != 0)
+  // Try to extend the immediate to a legal ARM rotating immediate
+  // by filling in non-demanded bits. ARM supports:
+  // - An 8-bit value rotated by an even number of bits (0, 2, 4, 6, ..., 30)
+  // - Any 8-bit immediate (Thumb2 also supports 16-bit splat patterns)
+  unsigned NonDemandedBits = ~DemandedBits;
+  
+  // Try filling with 0
+  NewImm = Imm & DemandedBits;
+  if (isLegalLogicalImmediate(NewImm, Subtarget) ||
+      ((Op.getOpcode() == ISD::AND ||
+        (Subtarget->isThumb2() && Op.getOpcode() == ISD::OR)) &&
+       isLegalLogicalImmediate(~NewImm, Subtarget))) {
+    ++NumOptimizedImms;
+  } else {
+    // Try filling with 1
+    NewImm = Imm | NonDemandedBits;
+    if (isLegalLogicalImmediate(NewImm, Subtarget) ||
+        ((Op.getOpcode() == ISD::AND ||
+          (Subtarget->isThumb2() && Op.getOpcode() == ISD::OR)) &&
+         isLegalLogicalImmediate(~NewImm, Subtarget))) {
+      ++NumOptimizedImms;
+    } else {
       return false;
-
-    // Merge the upper and lower halves of Imm and DemandedBits.
-    Imm |= Hi;
-    DemandedBits |= DemandedBitsHi;
-  }
-
-  ++NumOptimizedImms;
-
-  // Replicate the element across the register width.
-  while (EltSize < 32) {
-    NewImm |= NewImm << EltSize;
-    EltSize *= 2;
+    }
   }
 
   (void)OldImm;