modify how we lower the builtin

Author: YixingZhang007

llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp

@@ -284,6 +284,15 @@ void SPIRVInstPrinter::printInst(const MCInst *MI, uint64_t Address,
           }
           break;
         }
+        case SPIRV::OpPredicatedLoadINTEL: {
+          const unsigned NumOps = MI->getNumOperands();
+          if (NumOps > NumFixedOps) {
+            OS << ' ';
+            printSymbolicOperand<OperandCategory::MemoryOperandOperand>(
+              MI, FirstVariableIndex, OS);
+            break;
+          }
+        }
         default:
           printRemainingVariableOps(MI, NumFixedOps, OS);
           break;

llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp

@@ -1131,24 +1131,6 @@ static bool buildPipeInst(const SPIRV::IncomingCall *Call, unsigned Opcode,
   }
 }
 
-// Helper function for building Intel's predicated load/store instructions.
-static bool buildPredicatedLoadStoreInst(const SPIRV::IncomingCall *Call,
-                                          unsigned Opcode,
-                                          MachineIRBuilder &MIRBuilder,
-                                          SPIRVGlobalRegistry *GR) {
-  // Generate SPIRV instruction accordingly.
-  if (Call->isSpirvOp())
-    return buildOpFromWrapper(MIRBuilder, Opcode, Call, Register(0));
-
-  auto MIB = MIRBuilder.buildInstr(Opcode)
-                 .addDef(Call->ReturnRegister)
-                 .addUse(GR->getSPIRVTypeID(Call->ReturnType));
-  for (unsigned i = 0; i < Call->Arguments.size(); ++i)
-    MIB.addUse(Call->Arguments[i]);
-
-  return true;
-}
-
 static unsigned getNumComponentsForDim(SPIRV::Dim::Dim dim) {
   switch (dim) {
   case SPIRV::Dim::DIM_1D:
@@ -2444,7 +2426,19 @@ static bool generatePredicatedLoadStoreInst(const SPIRV::IncomingCall *Call,
   unsigned Opcode =
       SPIRV::lookupNativeBuiltin(Builtin->Name, Builtin->Set)->Opcode;
 
-  return buildPredicatedLoadStoreInst(Call, Opcode, MIRBuilder, GR);
+  bool IsSet = Opcode != SPIRV::OpPredicatedStoreINTEL;
+  unsigned ArgSz = Call->Arguments.size();
+  unsigned LiteralIdx = 0;
+  if(ArgSz > 3) {
+    LiteralIdx = 3;
+  }
+  SmallVector<uint32_t, 1> ImmArgs;
+  MachineRegisterInfo *MRI = MIRBuilder.getMRI();
+  if (LiteralIdx > 0)
+      ImmArgs.push_back(getConstFromIntrinsic(Call->Arguments[LiteralIdx], MRI));
+  Register TypeReg = GR->getSPIRVTypeID(Call->ReturnType);
+  return buildOpFromWrapper(MIRBuilder, Opcode, Call,
+                            IsSet ? TypeReg : Register(0), ImmArgs);
 }
 
 static bool buildNDRange(const SPIRV::IncomingCall *Call,

llvm/lib/Target/SPIRV/SPIRVInstrInfo.td

@@ -989,7 +989,7 @@ def OpSubgroup2DBlockStoreINTEL: Op<6235, (outs), (ins ID:$element_size, ID:$blo
                   "OpSubgroup2DBlockStoreINTEL $element_size $block_width $block_height $block_count $src_ptr $dst_base_ptr $memory_width $memory_height $memory_pitch $coord">;
 
 // SPV_INTEL_predicated_io
-def OpPredicatedLoadINTEL: Op<6528, (outs ID:$res), (ins ID:$ptr, ID:$predicate, ID:$default_value),
-                  "$res = OpPredicatedLoadINTEL $ptr $predicate $default_value">;
-def OpPredicatedStoreINTEL: Op<6529, (outs), (ins ID:$ptr, ID:$object, ID:$predicate),
+def OpPredicatedLoadINTEL: Op<6528, (outs ID:$res), (ins TYPE:$resType, ID:$ptr, ID:$predicate, ID:$default_value, variable_ops),
+                  "$res = OpPredicatedLoadINTEL $resType $ptr $predicate $default_value">;
+def OpPredicatedStoreINTEL: Op<6529, (outs), (ins ID:$ptr, ID:$object, ID:$predicate, variable_ops),
                   "OpPredicatedStoreINTEL $ptr $object $predicate">;

llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_predicated_io/predicated_io_generic.ll

@@ -9,7 +9,6 @@
 ; CHECK-DAG: Extension "SPV_INTEL_predicated_io"
 
 ; CHECK-DAG: %[[Int32Ty:[0-9]+]] = OpTypeInt 32 0
-; CHECK-DAG: %[[Const0:[0-9]+]] = OpConstant %[[Int32Ty]] 0
 ; CHECK-DAG: %[[VoidTy:[0-9]+]] = OpTypeVoid
 ; CHECK-DAG: %[[IntPtrTy:[0-9]+]] = OpTypePointer CrossWorkgroup %[[Int32Ty]]
 ; CHECK-DAG: %[[BoolTy:[0-9]+]] = OpTypeBool
@@ -18,10 +17,10 @@
 ; CHECK: %[[DefaultVal:]] = FunctionParameter %[[Int32Ty]]
 ; CHECK: %[[StoreObj:]] = FunctionParameter %[[Int32Ty]]
 ; CHECK: %[[Predicate:]] = FunctionParameter %[[BoolTy]]
-; CHECK: PredicatedLoadINTEL %[[Int32Ty]] %[[Result1:]] %[[LoadPtr]] %[[Predicate]] %[[DefaultVal]]
-; CHECK: PredicatedLoadINTEL %[[Int32Ty]] %[[Result2:]] %[[LoadPtr]] %[[Predicate]] %[[DefaultVal]] %[[Const0]]
+; CHECK: PredicatedLoadINTEL %[[Int32Ty]] %[[LoadPtr]] %[[Predicate]] %[[DefaultVal]]
+; CHECK: PredicatedLoadINTEL %[[Int32Ty]] %[[LoadPtr]] %[[Predicate]] %[[DefaultVal]] 0
 ; CHECK: PredicatedStoreINTEL %[[StorePtr]] %[[StoreObj]] %[[Predicate]]
-; CHECK: PredicatedStoreINTEL %[[StorePtr]] %[[StoreObj]] %[[Predicate]] %[[Const0]]
+; CHECK: PredicatedStoreINTEL %[[StorePtr]] %[[StoreObj]] %[[Predicate]] 0
 
 define spir_func void @foo(ptr addrspace(1) %load_pointer, ptr addrspace(1) %store_pointer, i32  %default_value, i32 %store_object, i1 zeroext %predicate) {
 entry:
@@ -35,4 +34,4 @@ entry:
 declare spir_func i32 @_Z27__spirv_PredicatedLoadINTELPU3AS1Kibi(ptr addrspace(1), i1, i32)
 declare spir_func i32 @_Z27__spirv_PredicatedLoadINTELPU3AS1Kibii(ptr addrspace(1), i1, i32, i32)
 declare spir_func void @_Z28__spirv_PredicatedStoreINTELPU3AS1Kiib(ptr addrspace(1), i32, i1)
-declare spir_func void @_Z28__spirv_PredicatedStoreINTELPU3AS1Kiibi(ptr addrspace(1), i32, i1, i32)
+declare spir_func void @_Z28__spirv_PredicatedStoreINTELPU3AS1Kiibi(ptr addrspace(1), i32, i1, i32)