@@ -4220,7 +4220,6 @@ static SDValue lowerADDSUBO_CARRY(SDValue Op, SelectionDAG &DAG,
42204220 SDValue OpCarryIn = valueToCarryFlag(Op.getOperand(2), DAG, InvertCarry);
42214221
42224222 SDLoc DL(Op);
4223- SDVTList VTs = DAG.getVTList(VT0, VT1);
42244223
42254224 SDValue Sum = DAG.getNode(Opcode, DL, DAG.getVTList(VT0, MVT::Glue), OpLHS,
42264225 OpRHS, OpCarryIn);
@@ -4229,7 +4228,7 @@ static SDValue lowerADDSUBO_CARRY(SDValue Op, SelectionDAG &DAG,
42294228 IsSigned ? overflowFlagToValue(Sum.getValue(1), VT1, DAG)
42304229 : carryFlagToValue(Sum.getValue(1), VT1, DAG, InvertCarry);
42314230
4232- return DAG.getNode(ISD::MERGE_VALUES, DL, VTs, Sum, OutFlag);
4231+ return DAG.getMergeValues({ Sum, OutFlag}, DL );
42334232}
42344233
42354234static SDValue LowerXALUO(SDValue Op, SelectionDAG &DAG) {
@@ -4254,8 +4253,7 @@ static SDValue LowerXALUO(SDValue Op, SelectionDAG &DAG) {
42544253 Overflow =
42554254 DAG.getNode(AArch64ISD::CSEL, DL, MVT::i32, FVal, TVal, CCVal, Overflow);
42564255
4257- SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::i32);
4258- return DAG.getNode(ISD::MERGE_VALUES, DL, VTs, Value, Overflow);
4256+ return DAG.getMergeValues({Value, Overflow}, DL);
42594257}
42604258
42614259// Prefetch operands are:
0 commit comments