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[X86] Update llc tests after optimizing VBLENDPS to VMOVSS
1 parent 135e8bd commit 934de03

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6 files changed

+24
-32
lines changed

6 files changed

+24
-32
lines changed

llvm/lib/Target/X86/X86FixupInstTuning.cpp

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -223,8 +223,7 @@ bool X86FixupInstTuningPass::processInstruction(
223223
};
224224

225225
auto ProcessBLENDToMOV = [&](unsigned MovOpc) -> bool {
226-
if (!MI.getOperand(NumOperands - 1).isImm() ||
227-
MI.getOperand(NumOperands - 1).getImm() != 1)
226+
if (MI.getOperand(NumOperands - 1).getImm() != 1)
228227
return false;
229228

230229
bool Force = MF.getFunction().hasOptSize();
@@ -235,22 +234,15 @@ bool X86FixupInstTuningPass::processInstruction(
235234
MI.removeOperand(NumOperands - 1);
236235
return true;
237236
};
237+
238238
switch (Opc) {
239-
case X86::VBLENDPSrri:
240-
case X86::VBLENDPSYrri:
241-
case X86::VBLENDMPSZ128rrkz:
242-
case X86::VBLENDMPSZ256rrkz:
243-
case X86::VBLENDMPSZrrkz: {
239+
case X86::VBLENDPSrri: {
244240
int Imm = MI.getOperand(NumOperands - 1).getImm();
245241
if (Imm != 1)
246242
return false;
247243
return ProcessBLENDToMOV(X86::VMOVSSrr);
248244
}
249-
case X86::VBLENDPDrri:
250-
case X86::VBLENDPDYrri:
251-
case X86::VBLENDMPDZ128rrkz:
252-
case X86::VBLENDMPDZ256rrkz:
253-
case X86::VBLENDMPDZrrkz: {
245+
case X86::VBLENDPDrri: {
254246
int Imm = MI.getOperand(NumOperands - 1).getImm();
255247
if (Imm != 1)
256248
return false;

llvm/test/CodeGen/X86/avx-insertelt.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ define <8 x float> @insert_f32_firstelt_of_low_subvector(<8 x float> %x, float %
88
; ALL-LABEL: insert_f32_firstelt_of_low_subvector:
99
; ALL: # %bb.0:
1010
; ALL-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1
11-
; ALL-NEXT: vmovss {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3]
11+
; ALL-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3,4,5,6,7]
1212
; ALL-NEXT: retq
1313
%i0 = insertelement <8 x float> %x, float %s, i32 0
1414
ret <8 x float> %i0

llvm/test/CodeGen/X86/masked_expandload.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -204,7 +204,7 @@ define <4 x double> @expandload_v4f64_v4i64(ptr %base, <4 x double> %src0, <4 x
204204
; AVX1-NEXT: retq
205205
; AVX1-NEXT: LBB1_1: ## %cond.load
206206
; AVX1-NEXT: vmovsd (%rdi), %xmm1 ## xmm1 = mem[0],zero
207-
; AVX1-NEXT: vmovsd {{.*#+}} ymm0 = ymm1[0],ymm0[1]
207+
; AVX1-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3]
208208
; AVX1-NEXT: addq $8, %rdi
209209
; AVX1-NEXT: testb $2, %al
210210
; AVX1-NEXT: je LBB1_4
@@ -245,7 +245,7 @@ define <4 x double> @expandload_v4f64_v4i64(ptr %base, <4 x double> %src0, <4 x
245245
; AVX2-NEXT: retq
246246
; AVX2-NEXT: LBB1_1: ## %cond.load
247247
; AVX2-NEXT: vmovsd (%rdi), %xmm1 ## xmm1 = mem[0],zero
248-
; AVX2-NEXT: vmovsd {{.*#+}} ymm0 = ymm1[0],ymm0[1]
248+
; AVX2-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3]
249249
; AVX2-NEXT: addq $8, %rdi
250250
; AVX2-NEXT: testb $2, %al
251251
; AVX2-NEXT: je LBB1_4
@@ -2111,7 +2111,7 @@ define <32 x float> @expandload_v32f32_v32i32(ptr %base, <32 x float> %src0, <32
21112111
; AVX1-NEXT: retq
21122112
; AVX1-NEXT: LBB8_1: ## %cond.load
21132113
; AVX1-NEXT: vmovss (%rdi), %xmm4 ## xmm4 = mem[0],zero,zero,zero
2114-
; AVX1-NEXT: vmovss {{.*#+}} ymm0 = ymm4[0],ymm0[1,2,3]
2114+
; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm4[0],ymm0[1,2,3,4,5,6,7]
21152115
; AVX1-NEXT: addq $4, %rdi
21162116
; AVX1-NEXT: testb $2, %al
21172117
; AVX1-NEXT: je LBB8_4
@@ -2159,7 +2159,7 @@ define <32 x float> @expandload_v32f32_v32i32(ptr %base, <32 x float> %src0, <32
21592159
; AVX1-NEXT: je LBB8_18
21602160
; AVX1-NEXT: LBB8_17: ## %cond.load29
21612161
; AVX1-NEXT: vmovss (%rdi), %xmm4 ## xmm4 = mem[0],zero,zero,zero
2162-
; AVX1-NEXT: vmovss {{.*#+}} ymm1 = ymm4[0],ymm1[1,2,3]
2162+
; AVX1-NEXT: vblendps {{.*#+}} ymm1 = ymm4[0],ymm1[1,2,3,4,5,6,7]
21632163
; AVX1-NEXT: addq $4, %rdi
21642164
; AVX1-NEXT: testl $512, %eax ## imm = 0x200
21652165
; AVX1-NEXT: je LBB8_20
@@ -2207,7 +2207,7 @@ define <32 x float> @expandload_v32f32_v32i32(ptr %base, <32 x float> %src0, <32
22072207
; AVX1-NEXT: je LBB8_34
22082208
; AVX1-NEXT: LBB8_33: ## %cond.load61
22092209
; AVX1-NEXT: vmovss (%rdi), %xmm4 ## xmm4 = mem[0],zero,zero,zero
2210-
; AVX1-NEXT: vmovss {{.*#+}} ymm2 = ymm4[0],ymm2[1,2,3]
2210+
; AVX1-NEXT: vblendps {{.*#+}} ymm2 = ymm4[0],ymm2[1,2,3,4,5,6,7]
22112211
; AVX1-NEXT: addq $4, %rdi
22122212
; AVX1-NEXT: testl $131072, %eax ## imm = 0x20000
22132213
; AVX1-NEXT: je LBB8_36
@@ -2255,7 +2255,7 @@ define <32 x float> @expandload_v32f32_v32i32(ptr %base, <32 x float> %src0, <32
22552255
; AVX1-NEXT: je LBB8_50
22562256
; AVX1-NEXT: LBB8_49: ## %cond.load93
22572257
; AVX1-NEXT: vmovss (%rdi), %xmm4 ## xmm4 = mem[0],zero,zero,zero
2258-
; AVX1-NEXT: vmovss {{.*#+}} ymm3 = ymm4[0],ymm3[1,2,3]
2258+
; AVX1-NEXT: vblendps {{.*#+}} ymm3 = ymm4[0],ymm3[1,2,3,4,5,6,7]
22592259
; AVX1-NEXT: addq $4, %rdi
22602260
; AVX1-NEXT: testl $33554432, %eax ## imm = 0x2000000
22612261
; AVX1-NEXT: je LBB8_52

llvm/test/CodeGen/X86/oddsubvector.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -235,7 +235,7 @@ define void @PR42833() {
235235
; AVX1-NEXT: vmovdqa c+144(%rip), %xmm3
236236
; AVX1-NEXT: vpaddd %xmm3, %xmm3, %xmm3
237237
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
238-
; AVX1-NEXT: vmovss {{.*#+}} ymm0 = ymm0[0],ymm2[1,2,3]
238+
; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm2[1,2,3,4,5,6,7]
239239
; AVX1-NEXT: vmovdqa d+144(%rip), %xmm2
240240
; AVX1-NEXT: vpsubd c+144(%rip), %xmm2, %xmm2
241241
; AVX1-NEXT: vmovups %ymm0, c+128(%rip)
@@ -317,7 +317,7 @@ define void @PR42833() {
317317
; XOP-NEXT: vmovdqa c+144(%rip), %xmm3
318318
; XOP-NEXT: vpaddd %xmm3, %xmm3, %xmm3
319319
; XOP-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
320-
; XOP-NEXT: vmovss {{.*#+}} ymm0 = ymm0[0],ymm2[1,2,3]
320+
; XOP-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm2[1,2,3,4,5,6,7]
321321
; XOP-NEXT: vmovdqa d+144(%rip), %xmm2
322322
; XOP-NEXT: vpsubd c+144(%rip), %xmm2, %xmm2
323323
; XOP-NEXT: vmovups %ymm0, c+128(%rip)

llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -322,7 +322,7 @@ define void @store_i64_stride5_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
322322
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm0, %ymm0
323323
; AVX-NEXT: vbroadcastsd 8(%rsi), %ymm6
324324
; AVX-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm6[2],ymm0[3]
325-
; AVX-NEXT: vmovsd {{.*#+}} ymm0 = ymm1[0],ymm0[1]
325+
; AVX-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3]
326326
; AVX-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm5[0],mem[0]
327327
; AVX-NEXT: vmovaps (%rdi), %xmm5
328328
; AVX-NEXT: vunpcklpd {{.*#+}} xmm5 = xmm5[0],mem[0]
@@ -762,7 +762,7 @@ define void @store_i64_stride5_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vec
762762
; AVX-NEXT: vbroadcastsd 40(%rsi), %ymm13
763763
; AVX-NEXT: vblendpd {{.*#+}} ymm9 = ymm9[0,1],ymm13[2,3]
764764
; AVX-NEXT: vblendpd {{.*#+}} ymm9 = ymm9[0,1,2],ymm12[3]
765-
; AVX-NEXT: vmovsd {{.*#+}} ymm9 = ymm5[0],ymm9[1]
765+
; AVX-NEXT: vblendpd {{.*#+}} ymm9 = ymm5[0],ymm9[1,2,3]
766766
; AVX-NEXT: vpermilps {{.*#+}} xmm12 = mem[2,3,2,3]
767767
; AVX-NEXT: vunpcklpd {{.*#+}} ymm13 = ymm1[0],mem[0],ymm1[2],mem[2]
768768
; AVX-NEXT: vblendps {{.*#+}} ymm12 = ymm12[0,1,2,3],ymm13[4,5,6,7]
@@ -1747,7 +1747,7 @@ define void @store_i64_stride5_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.ve
17471747
; AVX-NEXT: vbroadcastsd 56(%rcx), %ymm8
17481748
; AVX-NEXT: vblendpd {{.*#+}} ymm6 = ymm6[0,1],ymm8[2,3]
17491749
; AVX-NEXT: vmovapd 32(%r8), %ymm8
1750-
; AVX-NEXT: vmovsd {{.*#+}} ymm9 = ymm8[0],ymm13[1]
1750+
; AVX-NEXT: vblendpd {{.*#+}} ymm9 = ymm8[0],ymm13[1,2,3]
17511751
; AVX-NEXT: vmovupd %ymm9, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
17521752
; AVX-NEXT: vblendpd {{.*#+}} ymm9 = ymm15[0],ymm8[1],ymm15[2,3]
17531753
; AVX-NEXT: vmovupd %ymm9, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
@@ -1773,7 +1773,7 @@ define void @store_i64_stride5_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.ve
17731773
; AVX-NEXT: vmovapd 96(%r8), %ymm0
17741774
; AVX-NEXT: vblendpd $13, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm4 # 32-byte Folded Reload
17751775
; AVX-NEXT: # ymm4 = mem[0],ymm0[1],mem[2,3]
1776-
; AVX-NEXT: vmovsd {{.*#+}} ymm3 = ymm0[0],ymm3[1]
1776+
; AVX-NEXT: vblendpd {{.*#+}} ymm3 = ymm0[0],ymm3[1,2,3]
17771777
; AVX-NEXT: vblendpd {{.*#+}} ymm9 = ymm9[0,1],ymm0[2],ymm9[3]
17781778
; AVX-NEXT: vblendpd {{.*#+}} ymm2 = ymm2[0,1,2],ymm0[3]
17791779
; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm14, %xmm1 # 16-byte Folded Reload
@@ -3750,7 +3750,7 @@ define void @store_i64_stride5_vf32(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.ve
37503750
; AVX-NEXT: vbroadcastsd 248(%rcx), %ymm2
37513751
; AVX-NEXT: vblendpd {{.*#+}} ymm1 = ymm1[0,1],ymm2[2,3]
37523752
; AVX-NEXT: vmovapd 224(%r8), %ymm5
3753-
; AVX-NEXT: vmovsd {{.*#+}} ymm2 = ymm5[0],ymm11[1]
3753+
; AVX-NEXT: vblendpd {{.*#+}} ymm2 = ymm5[0],ymm11[1,2,3]
37543754
; AVX-NEXT: vmovupd %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
37553755
; AVX-NEXT: vblendpd {{.*#+}} ymm2 = ymm6[0],ymm5[1],ymm6[2,3]
37563756
; AVX-NEXT: vmovupd %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill

llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -191,7 +191,7 @@ define <8 x float> @shuffle_v8f32_00500000(<8 x float> %a, <8 x float> %b) {
191191
; AVX1-LABEL: shuffle_v8f32_00500000:
192192
; AVX1: # %bb.0:
193193
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm0[2,3,0,1]
194-
; AVX1-NEXT: vmovss {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]
194+
; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7]
195195
; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,1,0,4,4,4,4]
196196
; AVX1-NEXT: retq
197197
;
@@ -1422,14 +1422,14 @@ define <8 x float> @shuffle_v8f32_089abcde(<8 x float> %a, <8 x float> %b) {
14221422
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm1[2,3,0,1]
14231423
; AVX1-NEXT: vshufps {{.*#+}} ymm2 = ymm2[3,0],ymm1[0,0],ymm2[7,4],ymm1[4,4]
14241424
; AVX1-NEXT: vshufps {{.*#+}} ymm1 = ymm2[0,2],ymm1[1,2],ymm2[4,6],ymm1[5,6]
1425-
; AVX1-NEXT: vmovss {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]
1425+
; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7]
14261426
; AVX1-NEXT: retq
14271427
;
14281428
; AVX2-LABEL: shuffle_v8f32_089abcde:
14291429
; AVX2: # %bb.0:
14301430
; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = [u,0,1,2,3,4,5,6]
14311431
; AVX2-NEXT: vpermps %ymm1, %ymm2, %ymm1
1432-
; AVX2-NEXT: vmovss {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]
1432+
; AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7]
14331433
; AVX2-NEXT: retq
14341434
;
14351435
; AVX512VL-LABEL: shuffle_v8f32_089abcde:
@@ -1821,7 +1821,7 @@ define <8 x i32> @shuffle_v8i32_00500000(<8 x i32> %a, <8 x i32> %b) {
18211821
; AVX1-LABEL: shuffle_v8i32_00500000:
18221822
; AVX1: # %bb.0:
18231823
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm0[2,3,0,1]
1824-
; AVX1-NEXT: vmovss {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]
1824+
; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7]
18251825
; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,1,0,4,4,4,4]
18261826
; AVX1-NEXT: retq
18271827
;
@@ -3121,14 +3121,14 @@ define <8 x i32> @shuffle_v8i32_089abcde(<8 x i32> %a, <8 x i32> %b) {
31213121
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm1[2,3,0,1]
31223122
; AVX1-NEXT: vshufps {{.*#+}} ymm2 = ymm2[3,0],ymm1[0,0],ymm2[7,4],ymm1[4,4]
31233123
; AVX1-NEXT: vshufps {{.*#+}} ymm1 = ymm2[0,2],ymm1[1,2],ymm2[4,6],ymm1[5,6]
3124-
; AVX1-NEXT: vmovss {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]
3124+
; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7]
31253125
; AVX1-NEXT: retq
31263126
;
31273127
; AVX2-LABEL: shuffle_v8i32_089abcde:
31283128
; AVX2: # %bb.0:
31293129
; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = [u,0,1,2,3,4,5,6]
31303130
; AVX2-NEXT: vpermps %ymm1, %ymm2, %ymm1
3131-
; AVX2-NEXT: vmovss {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]
3131+
; AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7]
31323132
; AVX2-NEXT: retq
31333133
;
31343134
; AVX512VL-SLOW-LABEL: shuffle_v8i32_089abcde:

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