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llvm/lib/Target/X86/X86RegisterInfo.td

Lines changed: 2 additions & 2 deletions
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@@ -541,8 +541,8 @@ def SSP : X86Reg<"ssp", 0>;
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// R12, R13, R14, and R15 for X86-64) are callee-save registers.
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// In 64-mode, there are 12 additional i8 registers, SIL, DIL, BPL, SPL, and
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// R8B, ... R15B.
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// Allocate R12 and R13 last, as these require an extra byte when
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// encoded in x86_64 instructions.
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// Allocate R12, R13, R20, R21, R28 and R29 last, as these require an extra byte
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// when encoded in x86_64 instructions.
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// FIXME: Allow AH, CH, DH, BH to be used as general-purpose registers in
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// 64-bit mode. The main complication is that they cannot be encoded in an
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// instruction requiring a REX prefix, while SIL, DIL, BPL, R8D, etc.

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