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1 parent 2bd9f26 commit 93b3cbaCopy full SHA for 93b3cba
llvm/test/CodeGen/RISCV/rv32i-rv64i-float-double.ll
@@ -9,8 +9,6 @@
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; legalisation or DAG combines aren't incorrectly triggered when the F
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; extension isn't enabled.
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-; TODO: f32 parameters on RV64 with a soft-float ABI are anyext.
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-
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define float @float_test(float %a, float %b) nounwind {
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; RV32IF-LABEL: float_test:
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; RV32IF: # %bb.0:
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