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diggerlindiggerlin
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introduce a new ISDNODE POISON
1 parent 7eaaa4e commit 94201df

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12 files changed

+78
-22
lines changed

12 files changed

+78
-22
lines changed

‎llvm/include/llvm/CodeGen/ISDOpcodes.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -217,6 +217,9 @@ enum NodeType {
217217
/// UNDEF - An undefined node.
218218
UNDEF,
219219

220+
/// POISON - A poison node.
221+
POISON,
222+
220223
/// FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or
221224
/// is evaluated to UNDEF), or returns VAL otherwise. Note that each
222225
/// read of UNDEF can yield different value, but FREEZE(UNDEF) cannot.

‎llvm/include/llvm/CodeGen/SelectionDAG.h‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -873,7 +873,7 @@ class SelectionDAG {
873873
/// for integers, a type wider than) VT's element type.
874874
SDValue getSplatBuildVector(EVT VT, const SDLoc &DL, SDValue Op) {
875875
// VerifySDNode (via InsertNode) checks BUILD_VECTOR later.
876-
if (Op.getOpcode() == ISD::UNDEF) {
876+
if (Op.isUndef()) {
877877
assert((VT.getVectorElementType() == Op.getValueType() ||
878878
(VT.isInteger() &&
879879
VT.getVectorElementType().bitsLE(Op.getValueType()))) &&
@@ -889,7 +889,7 @@ class SelectionDAG {
889889
// Return a splat ISD::SPLAT_VECTOR node, consisting of Op splatted to all
890890
// elements.
891891
SDValue getSplatVector(EVT VT, const SDLoc &DL, SDValue Op) {
892-
if (Op.getOpcode() == ISD::UNDEF) {
892+
if (Op.isUndef()) {
893893
assert((VT.getVectorElementType() == Op.getValueType() ||
894894
(VT.isInteger() &&
895895
VT.getVectorElementType().bitsLE(Op.getValueType()))) &&
@@ -1130,6 +1130,9 @@ class SelectionDAG {
11301130
return getNode(ISD::UNDEF, SDLoc(), VT);
11311131
}
11321132

1133+
/// Return an POISON node. POISON does not have a useful SDLoc.
1134+
SDValue getPoison(EVT VT) { return getNode(ISD::POISON, SDLoc(), VT); }
1135+
11331136
/// Return a node that represents the runtime scaling 'MulImm * RuntimeVL'.
11341137
SDValue getVScale(const SDLoc &DL, EVT VT, APInt MulImm,
11351138
bool ConstantFold = true);

‎llvm/include/llvm/CodeGen/SelectionDAGNodes.h‎

Lines changed: 14 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -690,8 +690,20 @@ END_TWO_BYTE_PACK()
690690
/// \<target\>ISD namespace).
691691
bool isTargetOpcode() const { return NodeType >= ISD::BUILTIN_OP_END; }
692692

693-
/// Return true if the type of the node type undefined.
694-
bool isUndef() const { return NodeType == ISD::UNDEF; }
693+
/// Returns true if the node type is UNDEF or, when DoNotIncludeExplicitPoison
694+
/// is false, POISON.
695+
/// - When DoNotIncludeExplicitPoison is true, returns true only for UNDEF.
696+
/// - When DoNotIncludeExplicitPoison is false, returns true for both UNDEF
697+
/// and POISON.
698+
/// @param DoNotIncludeExplicitPoison Determines whether to check only for
699+
/// UNDEF.
700+
bool isUndef(bool DoNotIncludeExplicitPoison = false) const {
701+
return NodeType == ISD::UNDEF ||
702+
(!DoNotIncludeExplicitPoison && NodeType == ISD::POISON);
703+
}
704+
705+
/// Return true if the type of the node type poison.
706+
bool isPoison() const { return NodeType == ISD::POISON; }
695707

696708
/// Test if this node is a memory intrinsic (with valid pointer information).
697709
bool isMemIntrinsic() const { return SDNodeBits.IsMemIntrinsic; }

‎llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp‎

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -16145,7 +16145,7 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
1614516145
// also recursively replace t184 by t150.
1614616146
SDValue MaybePoisonOperand = N->getOperand(0).getOperand(OpNo);
1614716147
// Don't replace every single UNDEF everywhere with frozen UNDEF, though.
16148-
if (MaybePoisonOperand.getOpcode() == ISD::UNDEF)
16148+
if (MaybePoisonOperand.isUndef())
1614916149
continue;
1615016150
// First, freeze each offending operand.
1615116151
SDValue FrozenMaybePoisonOperand = DAG.getFreeze(MaybePoisonOperand);
@@ -16171,9 +16171,10 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
1617116171
// Finally, recreate the node, it's operands were updated to use
1617216172
// frozen operands, so we just need to use it's "original" operands.
1617316173
SmallVector<SDValue> Ops(N0->ops());
16174-
// Special-handle ISD::UNDEF, each single one of them can be it's own thing.
16174+
// Special-handle ISD::UNDEF, ISD::POISON, each single one of them can be it's
16175+
// own thing.
1617516176
for (SDValue &Op : Ops) {
16176-
if (Op.getOpcode() == ISD::UNDEF)
16177+
if (Op.isUndef())
1617716178
Op = DAG.getFreeze(Op);
1617816179
}
1617916180

@@ -24289,7 +24290,7 @@ static SDValue combineConcatVectorOfScalars(SDNode *N, SelectionDAG &DAG) {
2428924290
if (ISD::BITCAST == Op.getOpcode() &&
2429024291
!Op.getOperand(0).getValueType().isVector())
2429124292
Ops.push_back(Op.getOperand(0));
24292-
else if (ISD::UNDEF == Op.getOpcode())
24293+
else if (Op.isUndef())
2429324294
Ops.push_back(DAG.getNode(ISD::UNDEF, DL, SVT));
2429424295
else
2429524296
return SDValue();
@@ -24684,7 +24685,7 @@ SDValue DAGCombiner::visitCONCAT_VECTORS(SDNode *N) {
2468424685
// fold (concat_vectors (BUILD_VECTOR A, B, ...), (BUILD_VECTOR C, D, ...))
2468524686
// -> (BUILD_VECTOR A, B, ..., C, D, ...)
2468624687
auto IsBuildVectorOrUndef = [](const SDValue &Op) {
24687-
return ISD::UNDEF == Op.getOpcode() || ISD::BUILD_VECTOR == Op.getOpcode();
24688+
return Op.isUndef() || ISD::BUILD_VECTOR == Op.getOpcode();
2468824689
};
2468924690
if (llvm::all_of(N->ops(), IsBuildVectorOrUndef)) {
2469024691
SmallVector<SDValue, 8> Opnds;
@@ -24708,7 +24709,7 @@ SDValue DAGCombiner::visitCONCAT_VECTORS(SDNode *N) {
2470824709
EVT OpVT = Op.getValueType();
2470924710
unsigned NumElts = OpVT.getVectorNumElements();
2471024711

24711-
if (ISD::UNDEF == Op.getOpcode())
24712+
if (Op.isUndef())
2471224713
Opnds.append(NumElts, DAG.getUNDEF(MinVT));
2471324714

2471424715
if (ISD::BUILD_VECTOR == Op.getOpcode()) {

‎llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp‎

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -977,6 +977,22 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
977977
TargetLowering::LegalizeAction Action = TargetLowering::Legal;
978978
bool SimpleFinishLegalizing = true;
979979
switch (Node->getOpcode()) {
980+
// FIXME: If the node represents a poison value, replace it with an undef
981+
// value.
982+
// A poison value results from an erroneous operation but does not cause
983+
// immediate undefined behavior, allowing speculative execution.
984+
// Since most operations propagate poison, it is valid to replace poison
985+
// with an undef value, which can take any legal value of the same type.
986+
// This ensures that downstream computations do not rely on poison semantics.
987+
// Poison is more restrictive than undef. Since we replace poison with undef
988+
// here, the poison information will be lost after the code is executed. In
989+
// the futher, If we need to retain the poison information after the code is
990+
// executed, we will need to modify the code accordingly.
991+
case ISD::POISON: {
992+
SDValue UndefNode = DAG.getUNDEF(Node->getValueType(0));
993+
ReplaceNode(Node, UndefNode.getNode());
994+
break;
995+
}
980996
case ISD::INTRINSIC_W_CHAIN:
981997
case ISD::INTRINSIC_WO_CHAIN:
982998
case ISD::INTRINSIC_VOID:
@@ -3136,6 +3152,7 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
31363152
for (unsigned i = 0; i < Node->getNumValues(); i++)
31373153
Results.push_back(Node->getOperand(i));
31383154
break;
3155+
case ISD::POISON:
31393156
case ISD::UNDEF: {
31403157
EVT VT = Node->getValueType(0);
31413158
if (VT.isInteger())

‎llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -164,6 +164,7 @@ void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
164164
case ISD::STRICT_UINT_TO_FP:
165165
case ISD::SINT_TO_FP:
166166
case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
167+
case ISD::POISON:
167168
case ISD::UNDEF: R = SoftenFloatRes_UNDEF(N); break;
168169
case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break;
169170
case ISD::VECREDUCE_FADD:
@@ -1474,6 +1475,7 @@ void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
14741475
report_fatal_error("Do not know how to expand the result of this "
14751476
"operator!");
14761477
// clang-format off
1478+
case ISD::POISON:
14771479
case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
14781480
case ISD::SELECT: SplitRes_Select(N, Lo, Hi); break;
14791481
case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
@@ -2783,6 +2785,7 @@ void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
27832785

27842786
case ISD::SINT_TO_FP:
27852787
case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break;
2788+
case ISD::POISON:
27862789
case ISD::UNDEF: R = PromoteFloatRes_UNDEF(N); break;
27872790
case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break;
27882791
case ISD::VECREDUCE_FADD:
@@ -3243,6 +3246,7 @@ void DAGTypeLegalizer::SoftPromoteHalfResult(SDNode *N, unsigned ResNo) {
32433246
case ISD::STRICT_UINT_TO_FP:
32443247
case ISD::SINT_TO_FP:
32453248
case ISD::UINT_TO_FP: R = SoftPromoteHalfRes_XINT_TO_FP(N); break;
3249+
case ISD::POISON:
32463250
case ISD::UNDEF: R = SoftPromoteHalfRes_UNDEF(N); break;
32473251
case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break;
32483252
case ISD::VECREDUCE_FADD:

‎llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -118,6 +118,7 @@ void DAGTypeLegalizer::PromoteIntegerResult(SDNode *N, unsigned ResNo) {
118118
case ISD::VP_SRL: Res = PromoteIntRes_SRL(N); break;
119119
case ISD::VP_TRUNCATE:
120120
case ISD::TRUNCATE: Res = PromoteIntRes_TRUNCATE(N); break;
121+
case ISD::POISON:
121122
case ISD::UNDEF: Res = PromoteIntRes_UNDEF(N); break;
122123
case ISD::VAARG: Res = PromoteIntRes_VAARG(N); break;
123124
case ISD::VSCALE: Res = PromoteIntRes_VSCALE(N); break;
@@ -2911,6 +2912,7 @@ void DAGTypeLegalizer::ExpandIntegerResult(SDNode *N, unsigned ResNo) {
29112912
case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
29122913
case ISD::SELECT: SplitRes_Select(N, Lo, Hi); break;
29132914
case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
2915+
case ISD::POISON:
29142916
case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
29152917
case ISD::FREEZE: SplitRes_FREEZE(N, Lo, Hi); break;
29162918
case ISD::SETCC: ExpandIntRes_SETCC(N, Lo, Hi); break;

‎llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,7 @@ void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
7171
case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
7272
case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
7373
case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
74+
case ISD::POISON:
7475
case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
7576
case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
7677
case ISD::IS_FPCLASS: R = ScalarizeVecRes_IS_FPCLASS(N); break;
@@ -1118,6 +1119,7 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
11181119
case ISD::VP_MERGE:
11191120
case ISD::VP_SELECT: SplitRes_Select(N, Lo, Hi); break;
11201121
case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
1122+
case ISD::POISON:
11211123
case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
11221124
case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
11231125
case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
@@ -4553,6 +4555,7 @@ void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
45534555
case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
45544556
case ISD::VP_SETCC:
45554557
case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
4558+
case ISD::POISON:
45564559
case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
45574560
case ISD::VECTOR_SHUFFLE:
45584561
Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp‎

Lines changed: 20 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -5465,6 +5465,9 @@ bool SelectionDAG::isGuaranteedNotToBeUndefOrPoison(SDValue Op,
54655465
case ISD::CopyFromReg:
54665466
return true;
54675467

5468+
case ISD::POISON:
5469+
return false;
5470+
54685471
case ISD::UNDEF:
54695472
return PoisonOnly;
54705473

@@ -6314,9 +6317,10 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
63146317
Flags.setNonNeg(N1->getFlags().hasNonNeg());
63156318
return getNode(OpOpcode, DL, VT, N1.getOperand(0), Flags);
63166319
}
6317-
if (OpOpcode == ISD::UNDEF)
6320+
if (N1.isUndef())
63186321
// sext(undef) = 0, because the top bits will all be the same.
63196322
return getConstant(0, DL, VT);
6323+
63206324
break;
63216325
case ISD::ZERO_EXTEND:
63226326
assert(VT.isInteger() && N1.getValueType().isInteger() &&
@@ -6334,7 +6338,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
63346338
Flags.setNonNeg(N1->getFlags().hasNonNeg());
63356339
return getNode(ISD::ZERO_EXTEND, DL, VT, N1.getOperand(0), Flags);
63366340
}
6337-
if (OpOpcode == ISD::UNDEF)
6341+
if (N1.isUndef())
63386342
// zext(undef) = 0, because the top bits will be zero.
63396343
return getConstant(0, DL, VT);
63406344

@@ -6376,7 +6380,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
63766380
// (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
63776381
return getNode(OpOpcode, DL, VT, N1.getOperand(0), Flags);
63786382
}
6379-
if (OpOpcode == ISD::UNDEF)
6383+
if (N1.isUndef())
63806384
return getUNDEF(VT);
63816385

63826386
// (ext (trunc x)) -> x
@@ -6411,7 +6415,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
64116415
return getNode(ISD::TRUNCATE, DL, VT, N1.getOperand(0));
64126416
return N1.getOperand(0);
64136417
}
6414-
if (OpOpcode == ISD::UNDEF)
6418+
if (N1.isUndef())
64156419
return getUNDEF(VT);
64166420
if (OpOpcode == ISD::VSCALE && !NewNodesMustHaveLegalTypes)
64176421
return getVScale(DL, VT,
@@ -6429,22 +6433,22 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
64296433
break;
64306434
case ISD::ABS:
64316435
assert(VT.isInteger() && VT == N1.getValueType() && "Invalid ABS!");
6432-
if (OpOpcode == ISD::UNDEF)
6436+
if (N1.isUndef())
64336437
return getConstant(0, DL, VT);
64346438
break;
64356439
case ISD::BSWAP:
64366440
assert(VT.isInteger() && VT == N1.getValueType() && "Invalid BSWAP!");
64376441
assert((VT.getScalarSizeInBits() % 16 == 0) &&
64386442
"BSWAP types must be a multiple of 16 bits!");
6439-
if (OpOpcode == ISD::UNDEF)
6443+
if (N1.isUndef())
64406444
return getUNDEF(VT);
64416445
// bswap(bswap(X)) -> X.
64426446
if (OpOpcode == ISD::BSWAP)
64436447
return N1.getOperand(0);
64446448
break;
64456449
case ISD::BITREVERSE:
64466450
assert(VT.isInteger() && VT == N1.getValueType() && "Invalid BITREVERSE!");
6447-
if (OpOpcode == ISD::UNDEF)
6451+
if (N1.isUndef())
64486452
return getUNDEF(VT);
64496453
break;
64506454
case ISD::BITCAST:
@@ -6453,7 +6457,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
64536457
if (VT == N1.getValueType()) return N1; // noop conversion.
64546458
if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
64556459
return getNode(ISD::BITCAST, DL, VT, N1.getOperand(0));
6456-
if (OpOpcode == ISD::UNDEF)
6460+
if (N1.isUndef())
64576461
return getUNDEF(VT);
64586462
break;
64596463
case ISD::SCALAR_TO_VECTOR:
@@ -6463,7 +6467,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
64636467
N1.getValueType().isInteger() &&
64646468
VT.getVectorElementType().bitsLE(N1.getValueType()))) &&
64656469
"Illegal SCALAR_TO_VECTOR node!");
6466-
if (OpOpcode == ISD::UNDEF)
6470+
if (N1.isUndef())
64676471
return getUNDEF(VT);
64686472
// scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
64696473
if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
@@ -6474,7 +6478,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
64746478
break;
64756479
case ISD::FNEG:
64766480
// Negation of an unknown bag of bits is still completely undefined.
6477-
if (OpOpcode == ISD::UNDEF)
6481+
if (N1.isUndef())
64786482
return getUNDEF(VT);
64796483

64806484
if (OpOpcode == ISD::FNEG) // --X -> X
@@ -9244,6 +9248,11 @@ SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
92449248

92459249
SDVTList VTs = Indexed ?
92469250
getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
9251+
9252+
// Lower poison to undef.
9253+
if (Ptr.getNode()->isPoison())
9254+
Ptr = getUNDEF(Ptr.getValueType());
9255+
92479256
SDValue Ops[] = { Chain, Ptr, Offset };
92489257
FoldingSetNodeID ID;
92499258
AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
@@ -13380,7 +13389,7 @@ void BuildVectorSDNode::recastRawBits(bool IsLittleEndian,
1338013389
bool BuildVectorSDNode::isConstant() const {
1338113390
for (const SDValue &Op : op_values()) {
1338213391
unsigned Opc = Op.getOpcode();
13383-
if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
13392+
if (!Op.isUndef() && Opc != ISD::Constant && Opc != ISD::ConstantFP)
1338413393
return false;
1338513394
}
1338613395
return true;

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1819,7 +1819,7 @@ SDValue SelectionDAGBuilder::getValueImpl(const Value *V) {
18191819
return DAG.getConstantFP(*CFP, getCurSDLoc(), VT);
18201820

18211821
if (isa<UndefValue>(C) && !V->getType()->isAggregateType())
1822-
return DAG.getUNDEF(VT);
1822+
return isa<PoisonValue>(C) ? DAG.getPoison(VT) : DAG.getUNDEF(VT);
18231823

18241824
if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(C)) {
18251825
visit(CE->getOpcode(), *CE);

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