Add implementation

Author: badumbatish

llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

@@ -1692,6 +1692,26 @@ defm SIMD_RELAXED_FMIN :
 defm SIMD_RELAXED_FMAX :
    RelaxedBinary<F64x2, int_wasm_relaxed_max, "relaxed_max", 0x110>;
 
+// Transform standard fminimum/fmaximum to relaxed versions
+// AddedComplexity ensures these patterns match before the standard MIN/MAX
+let AddedComplexity = 1 in {
+def : Pat<(v4f32 (fminimum (v4f32 V128:$lhs), (v4f32 V128:$rhs))),
+          (SIMD_RELAXED_FMIN_F32x4 V128:$lhs, V128:$rhs)>,
+      Requires<[HasRelaxedSIMD]>;
+
+def : Pat<(v4f32 (fmaximum (v4f32 V128:$lhs), (v4f32 V128:$rhs))),
+          (SIMD_RELAXED_FMAX_F32x4 V128:$lhs, V128:$rhs)>,
+      Requires<[HasRelaxedSIMD]>;
+
+def : Pat<(v2f64 (fminimum (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
+          (SIMD_RELAXED_FMIN_F64x2 V128:$lhs, V128:$rhs)>,
+      Requires<[HasRelaxedSIMD]>;
+
+def : Pat<(v2f64 (fmaximum (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
+          (SIMD_RELAXED_FMAX_F64x2 V128:$lhs, V128:$rhs)>,
+      Requires<[HasRelaxedSIMD]>;
+}
+
 //===----------------------------------------------------------------------===//
 // Relaxed rounding q15 multiplication
 //===----------------------------------------------------------------------===//

llvm/test/CodeGen/WebAssembly/simd-relaxed-fmax.ll

@@ -12,7 +12,7 @@ define <4 x float> @test_max_f32x4(<4 x float> %a, <4 x float> %b) {
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    local.get 1
-; CHECK-NEXT:    f32x4.max
+; CHECK-NEXT:    f32x4.relaxed_max
 ; CHECK-NEXT:    # fallthrough-return
   %result = call <4 x float> @llvm.maximum.v4f32(<4 x float> %a, <4 x float> %b)
   ret <4 x float> %result
@@ -25,7 +25,7 @@ define <2 x double> @test_max_f64x2(<2 x double> %a, <2 x double> %b) {
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    local.get 1
-; CHECK-NEXT:    f64x2.max
+; CHECK-NEXT:    f64x2.relaxed_max
 ; CHECK-NEXT:    # fallthrough-return
   %result = call <2 x double> @llvm.maximum.v2f64(<2 x double> %a, <2 x double> %b)
   ret <2 x double> %result

llvm/test/CodeGen/WebAssembly/simd-relaxed-fmin.ll

@@ -11,7 +11,7 @@ define <4 x float> @test_min_f32x4(<4 x float> %a, <4 x float> %b) {
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    local.get 1
-; CHECK-NEXT:    f32x4.min
+; CHECK-NEXT:    f32x4.relaxed_min
 ; CHECK-NEXT:    # fallthrough-return
   %result = call <4 x float> @llvm.minimum.v4f32(<4 x float> %a, <4 x float> %b)
   ret <4 x float> %result
@@ -24,7 +24,7 @@ define <2 x double> @test_min_f64x2(<2 x double> %a, <2 x double> %b) {
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    local.get 1
-; CHECK-NEXT:    f64x2.min
+; CHECK-NEXT:    f64x2.relaxed_min
 ; CHECK-NEXT:    # fallthrough-return
   %result = call <2 x double> @llvm.minimum.v2f64(<2 x double> %a, <2 x double> %b)
   ret <2 x double> %result