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[AArch64]: Updated tests
1 parent f237020 commit 956b849

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7 files changed

+258
-177
lines changed

7 files changed

+258
-177
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‎llvm/test/CodeGen/AArch64/bsl.ll‎

Lines changed: 64 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -32,17 +32,19 @@ define <1 x i64> @bsl_v1i64(<1 x i64> %0, <1 x i64> %1, <1 x i64> %2) {
3232
define <1 x i64> @nbsl_v1i64(<1 x i64> %0, <1 x i64> %1, <1 x i64> %2) {
3333
; NEON-LABEL: nbsl_v1i64:
3434
; NEON: // %bb.0:
35-
; NEON-NEXT: bif v0.8b, v1.8b, v2.8b
35+
; NEON-NEXT: and v0.8b, v2.8b, v0.8b
36+
; NEON-NEXT: bic v1.8b, v1.8b, v2.8b
3637
; NEON-NEXT: mvn v0.8b, v0.8b
38+
; NEON-NEXT: bic v0.8b, v0.8b, v1.8b
3739
; NEON-NEXT: ret
3840
;
3941
; SVE2-LABEL: nbsl_v1i64:
4042
; SVE2: // %bb.0:
4143
; SVE2-NEXT: // kill: def $d0 killed $d0 def $z0
4244
; SVE2-NEXT: // kill: def $d2 killed $d2 def $z2
43-
; SVE2-NEXT: // kill: def $d1 killed $d1 def $z1
44-
; SVE2-NEXT: nbsl z0.d, z0.d, z1.d, z2.d
45-
; SVE2-NEXT: // kill: def $d0 killed $d0 killed $z0
45+
; SVE2-NEXT: bic v1.8b, v1.8b, v2.8b
46+
; SVE2-NEXT: nbsl z0.d, z0.d, z2.d, z2.d
47+
; SVE2-NEXT: bic v0.8b, v0.8b, v1.8b
4648
; SVE2-NEXT: ret
4749
%4 = and <1 x i64> %2, %0
4850
%5 = xor <1 x i64> %2, splat (i64 -1)
@@ -78,9 +80,8 @@ define <1 x i64> @bsl1n_v1i64(<1 x i64> %0, <1 x i64> %1, <1 x i64> %2) {
7880
define <1 x i64> @bsl2n_v1i64(<1 x i64> %0, <1 x i64> %1, <1 x i64> %2) {
7981
; NEON-LABEL: bsl2n_v1i64:
8082
; NEON: // %bb.0:
81-
; NEON-NEXT: and v0.8b, v2.8b, v0.8b
82-
; NEON-NEXT: orr v1.8b, v2.8b, v1.8b
83-
; NEON-NEXT: orn v0.8b, v0.8b, v1.8b
83+
; NEON-NEXT: mvn v1.8b, v1.8b
84+
; NEON-NEXT: bif v0.8b, v1.8b, v2.8b
8485
; NEON-NEXT: ret
8586
;
8687
; SVE2-LABEL: bsl2n_v1i64:
@@ -118,17 +119,19 @@ define <2 x i64> @bsl_v2i64(<2 x i64> %0, <2 x i64> %1, <2 x i64> %2) {
118119
define <2 x i64> @nbsl_v2i64(<2 x i64> %0, <2 x i64> %1, <2 x i64> %2) {
119120
; NEON-LABEL: nbsl_v2i64:
120121
; NEON: // %bb.0:
121-
; NEON-NEXT: bif v0.16b, v1.16b, v2.16b
122+
; NEON-NEXT: and v0.16b, v2.16b, v0.16b
123+
; NEON-NEXT: bic v1.16b, v1.16b, v2.16b
122124
; NEON-NEXT: mvn v0.16b, v0.16b
125+
; NEON-NEXT: bic v0.16b, v0.16b, v1.16b
123126
; NEON-NEXT: ret
124127
;
125128
; SVE2-LABEL: nbsl_v2i64:
126129
; SVE2: // %bb.0:
127130
; SVE2-NEXT: // kill: def $q0 killed $q0 def $z0
128131
; SVE2-NEXT: // kill: def $q2 killed $q2 def $z2
129-
; SVE2-NEXT: // kill: def $q1 killed $q1 def $z1
130-
; SVE2-NEXT: nbsl z0.d, z0.d, z1.d, z2.d
131-
; SVE2-NEXT: // kill: def $q0 killed $q0 killed $z0
132+
; SVE2-NEXT: bic v1.16b, v1.16b, v2.16b
133+
; SVE2-NEXT: nbsl z0.d, z0.d, z2.d, z2.d
134+
; SVE2-NEXT: bic v0.16b, v0.16b, v1.16b
132135
; SVE2-NEXT: ret
133136
%4 = and <2 x i64> %2, %0
134137
%5 = xor <2 x i64> %2, splat (i64 -1)
@@ -164,9 +167,8 @@ define <2 x i64> @bsl1n_v2i64(<2 x i64> %0, <2 x i64> %1, <2 x i64> %2) {
164167
define <2 x i64> @bsl2n_v2i64(<2 x i64> %0, <2 x i64> %1, <2 x i64> %2) {
165168
; NEON-LABEL: bsl2n_v2i64:
166169
; NEON: // %bb.0:
167-
; NEON-NEXT: and v0.16b, v2.16b, v0.16b
168-
; NEON-NEXT: orr v1.16b, v2.16b, v1.16b
169-
; NEON-NEXT: orn v0.16b, v0.16b, v1.16b
170+
; NEON-NEXT: mvn v1.16b, v1.16b
171+
; NEON-NEXT: bif v0.16b, v1.16b, v2.16b
170172
; NEON-NEXT: ret
171173
;
172174
; SVE2-LABEL: bsl2n_v2i64:
@@ -189,17 +191,18 @@ define <2 x i64> @bsl2n_v2i64(<2 x i64> %0, <2 x i64> %1, <2 x i64> %2) {
189191
define <8 x i8> @nbsl_v8i8(<8 x i8> %0, <8 x i8> %1, <8 x i8> %2) {
190192
; NEON-LABEL: nbsl_v8i8:
191193
; NEON: // %bb.0:
192-
; NEON-NEXT: bif v0.8b, v1.8b, v2.8b
193-
; NEON-NEXT: mvn v0.8b, v0.8b
194+
; NEON-NEXT: and v3.8b, v2.8b, v1.8b
195+
; NEON-NEXT: and v0.8b, v2.8b, v0.8b
196+
; NEON-NEXT: orn v1.8b, v3.8b, v1.8b
197+
; NEON-NEXT: bic v0.8b, v1.8b, v0.8b
194198
; NEON-NEXT: ret
195199
;
196200
; SVE2-LABEL: nbsl_v8i8:
197201
; SVE2: // %bb.0:
198-
; SVE2-NEXT: // kill: def $d0 killed $d0 def $z0
199-
; SVE2-NEXT: // kill: def $d2 killed $d2 def $z2
200-
; SVE2-NEXT: // kill: def $d1 killed $d1 def $z1
201-
; SVE2-NEXT: nbsl z0.d, z0.d, z1.d, z2.d
202-
; SVE2-NEXT: // kill: def $d0 killed $d0 killed $z0
202+
; SVE2-NEXT: and v3.8b, v2.8b, v1.8b
203+
; SVE2-NEXT: and v0.8b, v2.8b, v0.8b
204+
; SVE2-NEXT: orn v1.8b, v3.8b, v1.8b
205+
; SVE2-NEXT: bic v0.8b, v1.8b, v0.8b
203206
; SVE2-NEXT: ret
204207
%4 = and <8 x i8> %2, %0
205208
%5 = xor <8 x i8> %2, splat (i8 -1)
@@ -212,17 +215,18 @@ define <8 x i8> @nbsl_v8i8(<8 x i8> %0, <8 x i8> %1, <8 x i8> %2) {
212215
define <4 x i16> @nbsl_v4i16(<4 x i16> %0, <4 x i16> %1, <4 x i16> %2) {
213216
; NEON-LABEL: nbsl_v4i16:
214217
; NEON: // %bb.0:
215-
; NEON-NEXT: bif v0.8b, v1.8b, v2.8b
216-
; NEON-NEXT: mvn v0.8b, v0.8b
218+
; NEON-NEXT: and v3.8b, v2.8b, v1.8b
219+
; NEON-NEXT: and v0.8b, v2.8b, v0.8b
220+
; NEON-NEXT: orn v1.8b, v3.8b, v1.8b
221+
; NEON-NEXT: bic v0.8b, v1.8b, v0.8b
217222
; NEON-NEXT: ret
218223
;
219224
; SVE2-LABEL: nbsl_v4i16:
220225
; SVE2: // %bb.0:
221-
; SVE2-NEXT: // kill: def $d0 killed $d0 def $z0
222-
; SVE2-NEXT: // kill: def $d2 killed $d2 def $z2
223-
; SVE2-NEXT: // kill: def $d1 killed $d1 def $z1
224-
; SVE2-NEXT: nbsl z0.d, z0.d, z1.d, z2.d
225-
; SVE2-NEXT: // kill: def $d0 killed $d0 killed $z0
226+
; SVE2-NEXT: and v3.8b, v2.8b, v1.8b
227+
; SVE2-NEXT: and v0.8b, v2.8b, v0.8b
228+
; SVE2-NEXT: orn v1.8b, v3.8b, v1.8b
229+
; SVE2-NEXT: bic v0.8b, v1.8b, v0.8b
226230
; SVE2-NEXT: ret
227231
%4 = and <4 x i16> %2, %0
228232
%5 = xor <4 x i16> %2, splat (i16 -1)
@@ -235,17 +239,19 @@ define <4 x i16> @nbsl_v4i16(<4 x i16> %0, <4 x i16> %1, <4 x i16> %2) {
235239
define <2 x i32> @nbsl_v2i32(<2 x i32> %0, <2 x i32> %1, <2 x i32> %2) {
236240
; NEON-LABEL: nbsl_v2i32:
237241
; NEON: // %bb.0:
238-
; NEON-NEXT: bif v0.8b, v1.8b, v2.8b
242+
; NEON-NEXT: and v0.8b, v2.8b, v0.8b
243+
; NEON-NEXT: bic v1.8b, v1.8b, v2.8b
239244
; NEON-NEXT: mvn v0.8b, v0.8b
245+
; NEON-NEXT: bic v0.8b, v0.8b, v1.8b
240246
; NEON-NEXT: ret
241247
;
242248
; SVE2-LABEL: nbsl_v2i32:
243249
; SVE2: // %bb.0:
244250
; SVE2-NEXT: // kill: def $d0 killed $d0 def $z0
245251
; SVE2-NEXT: // kill: def $d2 killed $d2 def $z2
246-
; SVE2-NEXT: // kill: def $d1 killed $d1 def $z1
247-
; SVE2-NEXT: nbsl z0.d, z0.d, z1.d, z2.d
248-
; SVE2-NEXT: // kill: def $d0 killed $d0 killed $z0
252+
; SVE2-NEXT: bic v1.8b, v1.8b, v2.8b
253+
; SVE2-NEXT: nbsl z0.d, z0.d, z2.d, z2.d
254+
; SVE2-NEXT: bic v0.8b, v0.8b, v1.8b
249255
; SVE2-NEXT: ret
250256
%4 = and <2 x i32> %2, %0
251257
%5 = xor <2 x i32> %2, splat (i32 -1)
@@ -258,17 +264,18 @@ define <2 x i32> @nbsl_v2i32(<2 x i32> %0, <2 x i32> %1, <2 x i32> %2) {
258264
define <16 x i8> @nbsl_v16i8(<16 x i8> %0, <16 x i8> %1, <16 x i8> %2) {
259265
; NEON-LABEL: nbsl_v16i8:
260266
; NEON: // %bb.0:
261-
; NEON-NEXT: bif v0.16b, v1.16b, v2.16b
262-
; NEON-NEXT: mvn v0.16b, v0.16b
267+
; NEON-NEXT: and v3.16b, v2.16b, v1.16b
268+
; NEON-NEXT: and v0.16b, v2.16b, v0.16b
269+
; NEON-NEXT: orn v1.16b, v3.16b, v1.16b
270+
; NEON-NEXT: bic v0.16b, v1.16b, v0.16b
263271
; NEON-NEXT: ret
264272
;
265273
; SVE2-LABEL: nbsl_v16i8:
266274
; SVE2: // %bb.0:
267-
; SVE2-NEXT: // kill: def $q0 killed $q0 def $z0
268-
; SVE2-NEXT: // kill: def $q2 killed $q2 def $z2
269-
; SVE2-NEXT: // kill: def $q1 killed $q1 def $z1
270-
; SVE2-NEXT: nbsl z0.d, z0.d, z1.d, z2.d
271-
; SVE2-NEXT: // kill: def $q0 killed $q0 killed $z0
275+
; SVE2-NEXT: and v3.16b, v2.16b, v1.16b
276+
; SVE2-NEXT: and v0.16b, v2.16b, v0.16b
277+
; SVE2-NEXT: orn v1.16b, v3.16b, v1.16b
278+
; SVE2-NEXT: bic v0.16b, v1.16b, v0.16b
272279
; SVE2-NEXT: ret
273280
%4 = and <16 x i8> %2, %0
274281
%5 = xor <16 x i8> %2, splat (i8 -1)
@@ -281,17 +288,18 @@ define <16 x i8> @nbsl_v16i8(<16 x i8> %0, <16 x i8> %1, <16 x i8> %2) {
281288
define <8 x i16> @nbsl_v8i16(<8 x i16> %0, <8 x i16> %1, <8 x i16> %2) {
282289
; NEON-LABEL: nbsl_v8i16:
283290
; NEON: // %bb.0:
284-
; NEON-NEXT: bif v0.16b, v1.16b, v2.16b
285-
; NEON-NEXT: mvn v0.16b, v0.16b
291+
; NEON-NEXT: and v3.16b, v2.16b, v1.16b
292+
; NEON-NEXT: and v0.16b, v2.16b, v0.16b
293+
; NEON-NEXT: orn v1.16b, v3.16b, v1.16b
294+
; NEON-NEXT: bic v0.16b, v1.16b, v0.16b
286295
; NEON-NEXT: ret
287296
;
288297
; SVE2-LABEL: nbsl_v8i16:
289298
; SVE2: // %bb.0:
290-
; SVE2-NEXT: // kill: def $q0 killed $q0 def $z0
291-
; SVE2-NEXT: // kill: def $q2 killed $q2 def $z2
292-
; SVE2-NEXT: // kill: def $q1 killed $q1 def $z1
293-
; SVE2-NEXT: nbsl z0.d, z0.d, z1.d, z2.d
294-
; SVE2-NEXT: // kill: def $q0 killed $q0 killed $z0
299+
; SVE2-NEXT: and v3.16b, v2.16b, v1.16b
300+
; SVE2-NEXT: and v0.16b, v2.16b, v0.16b
301+
; SVE2-NEXT: orn v1.16b, v3.16b, v1.16b
302+
; SVE2-NEXT: bic v0.16b, v1.16b, v0.16b
295303
; SVE2-NEXT: ret
296304
%4 = and <8 x i16> %2, %0
297305
%5 = xor <8 x i16> %2, splat (i16 -1)
@@ -304,17 +312,19 @@ define <8 x i16> @nbsl_v8i16(<8 x i16> %0, <8 x i16> %1, <8 x i16> %2) {
304312
define <4 x i32> @nbsl_v4i32(<4 x i32> %0, <4 x i32> %1, <4 x i32> %2) {
305313
; NEON-LABEL: nbsl_v4i32:
306314
; NEON: // %bb.0:
307-
; NEON-NEXT: bif v0.16b, v1.16b, v2.16b
315+
; NEON-NEXT: and v0.16b, v2.16b, v0.16b
316+
; NEON-NEXT: bic v1.16b, v1.16b, v2.16b
308317
; NEON-NEXT: mvn v0.16b, v0.16b
318+
; NEON-NEXT: bic v0.16b, v0.16b, v1.16b
309319
; NEON-NEXT: ret
310320
;
311321
; SVE2-LABEL: nbsl_v4i32:
312322
; SVE2: // %bb.0:
313323
; SVE2-NEXT: // kill: def $q0 killed $q0 def $z0
314324
; SVE2-NEXT: // kill: def $q2 killed $q2 def $z2
315-
; SVE2-NEXT: // kill: def $q1 killed $q1 def $z1
316-
; SVE2-NEXT: nbsl z0.d, z0.d, z1.d, z2.d
317-
; SVE2-NEXT: // kill: def $q0 killed $q0 killed $z0
325+
; SVE2-NEXT: bic v1.16b, v1.16b, v2.16b
326+
; SVE2-NEXT: nbsl z0.d, z0.d, z2.d, z2.d
327+
; SVE2-NEXT: bic v0.16b, v0.16b, v1.16b
318328
; SVE2-NEXT: ret
319329
%4 = and <4 x i32> %2, %0
320330
%5 = xor <4 x i32> %2, splat (i32 -1)
@@ -471,16 +481,14 @@ define <2 x i64> @nand_q(<2 x i64> %0, <2 x i64> %1) #0 {
471481
define <2 x i64> @nor_q(<2 x i64> %0, <2 x i64> %1) #0 {
472482
; NEON-LABEL: nor_q:
473483
; NEON: // %bb.0:
474-
; NEON-NEXT: orr v0.16b, v1.16b, v0.16b
475-
; NEON-NEXT: mvn v0.16b, v0.16b
484+
; NEON-NEXT: mvn v1.16b, v1.16b
485+
; NEON-NEXT: bic v0.16b, v1.16b, v0.16b
476486
; NEON-NEXT: ret
477487
;
478488
; SVE2-LABEL: nor_q:
479489
; SVE2: // %bb.0:
480-
; SVE2-NEXT: // kill: def $q0 killed $q0 def $z0
481-
; SVE2-NEXT: // kill: def $q1 killed $q1 def $z1
482-
; SVE2-NEXT: nbsl z0.d, z0.d, z1.d, z0.d
483-
; SVE2-NEXT: // kill: def $q0 killed $q0 killed $z0
490+
; SVE2-NEXT: mvn v1.16b, v1.16b
491+
; SVE2-NEXT: bic v0.16b, v1.16b, v0.16b
484492
; SVE2-NEXT: ret
485493
%3 = or <2 x i64> %1, %0
486494
%4 = xor <2 x i64> %3, splat (i64 -1)

‎llvm/test/CodeGen/AArch64/build-vector-dup-simd.ll‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -117,10 +117,10 @@ entry:
117117
define <1 x float> @dup_v1i32_ueq(float %a, float %b) {
118118
; CHECK-NOFULLFP16-LABEL: dup_v1i32_ueq:
119119
; CHECK-NOFULLFP16: // %bb.0: // %entry
120-
; CHECK-NOFULLFP16-NEXT: fcmgt s2, s0, s1
121-
; CHECK-NOFULLFP16-NEXT: fcmgt s0, s1, s0
122-
; CHECK-NOFULLFP16-NEXT: orr v0.16b, v0.16b, v2.16b
123-
; CHECK-NOFULLFP16-NEXT: mvn v0.8b, v0.8b
120+
; CHECK-NOFULLFP16-NEXT: fcmgt s2, s1, s0
121+
; CHECK-NOFULLFP16-NEXT: fcmgt s0, s0, s1
122+
; CHECK-NOFULLFP16-NEXT: mvn v1.8b, v2.8b
123+
; CHECK-NOFULLFP16-NEXT: bic v0.8b, v1.8b, v0.8b
124124
; CHECK-NOFULLFP16-NEXT: ret
125125
;
126126
; CHECK-NONANS-LABEL: dup_v1i32_ueq:
@@ -130,10 +130,10 @@ define <1 x float> @dup_v1i32_ueq(float %a, float %b) {
130130
;
131131
; CHECK-FULLFP16-LABEL: dup_v1i32_ueq:
132132
; CHECK-FULLFP16: // %bb.0: // %entry
133-
; CHECK-FULLFP16-NEXT: fcmgt s2, s0, s1
134-
; CHECK-FULLFP16-NEXT: fcmgt s0, s1, s0
135-
; CHECK-FULLFP16-NEXT: orr v0.16b, v0.16b, v2.16b
136-
; CHECK-FULLFP16-NEXT: mvn v0.8b, v0.8b
133+
; CHECK-FULLFP16-NEXT: fcmgt s2, s1, s0
134+
; CHECK-FULLFP16-NEXT: fcmgt s0, s0, s1
135+
; CHECK-FULLFP16-NEXT: mvn v1.8b, v2.8b
136+
; CHECK-FULLFP16-NEXT: bic v0.8b, v1.8b, v0.8b
137137
; CHECK-FULLFP16-NEXT: ret
138138
entry:
139139
%0 = fcmp ueq float %a, %b
@@ -260,10 +260,10 @@ entry:
260260
define <1 x float> @dup_v1i32_uno(float %a, float %b) {
261261
; CHECK-LABEL: dup_v1i32_uno:
262262
; CHECK: // %bb.0: // %entry
263-
; CHECK-NEXT: fcmge s2, s0, s1
264-
; CHECK-NEXT: fcmgt s0, s1, s0
265-
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
266-
; CHECK-NEXT: mvn v0.8b, v0.8b
263+
; CHECK-NEXT: fcmgt s2, s1, s0
264+
; CHECK-NEXT: fcmge s0, s0, s1
265+
; CHECK-NEXT: mvn v1.8b, v2.8b
266+
; CHECK-NEXT: bic v0.8b, v1.8b, v0.8b
267267
; CHECK-NEXT: ret
268268
entry:
269269
%0 = fcmp uno float %a, %b

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