fixup! RegId->Reg

topperc · topperc · commit 962590dff4b0 · 2025-11-10T23:44:23.000-08:00
diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -1456,8 +1456,8 @@ MCOperand AMDGPUDisassembler::errOperand(unsigned V,
   return MCOperand();
 }
 
-inline MCOperand AMDGPUDisassembler::createRegOperand(MCRegister RegId) const {
-  return MCOperand::createReg(AMDGPU::getMCReg(RegId, STI));
+inline MCOperand AMDGPUDisassembler::createRegOperand(MCRegister Reg) const {
+  return MCOperand::createReg(AMDGPU::getMCReg(Reg, STI));
 }
 
 inline
diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
@@ -69,7 +69,7 @@ class AMDGPUDisassembler : public MCDisassembler {
 
   const char* getRegClassName(unsigned RegClassID) const;
 
-  MCOperand createRegOperand(MCRegister RegId) const;
+  MCOperand createRegOperand(MCRegister Reg) const;
   MCOperand createRegOperand(unsigned RegClassID, unsigned Val) const;
   MCOperand createSRegOperand(unsigned SRegClassID, unsigned Val) const;
   MCOperand createVGPR16Operand(unsigned RegIdx, bool IsHi) const;

Original file line number	Diff line number	Diff line change
`@@ -1456,8 +1456,8 @@ MCOperand AMDGPUDisassembler::errOperand(unsigned V,`
`1456`	`1456`	`return MCOperand();`
`1457`	`1457`	`}`
`1458`	`1458`
`1459`		`-inline MCOperand AMDGPUDisassembler::createRegOperand(MCRegister RegId) const {`
`1460`		`- return MCOperand::createReg(AMDGPU::getMCReg(RegId, STI));`
	`1459`	`+inline MCOperand AMDGPUDisassembler::createRegOperand(MCRegister Reg) const {`
	`1460`	`+ return MCOperand::createReg(AMDGPU::getMCReg(Reg, STI));`
`1461`	`1461`	`}`
`1462`	`1462`
`1463`	`1463`	`inline`