Regenerate failing test checks

Author: s-barannikov

llvm/test/CodeGen/PowerPC/merge_stores_dereferenceable.ll

@@ -1,12 +1,17 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
 
 ; This code causes an assertion failure if dereferenceable flag is not properly set when in merging consecutive stores
-; CHECK-LABEL: func:
-; CHECK: lxvd2x [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
-; CHECK-NOT: lxvd2x
-; CHECK: stxvd2x [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
 
 define <2 x i64> @func(ptr %pdst) {
+; CHECK-LABEL: func:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    addi 4, 1, -32
+; CHECK-NEXT:    lxvd2x 0, 0, 4
+; CHECK-NEXT:    xxswapd 34, 0
+; CHECK-NEXT:    lxvd2x 0, 0, 4
+; CHECK-NEXT:    stxvd2x 0, 0, 3
+; CHECK-NEXT:    blr
 entry:
   %a = alloca [4 x i64], align 8
   %psrc1 = getelementptr inbounds i64, ptr %a, i64 1