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Bhe6669Khao7342huxuan0307Ziyue-ZhangMrLinWang
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[RISCV] Add processor definition for XiangShan-KunMingHu
This pull request adds definitions for the XiangShan-KunMingHu processor. "XiangShan" is a high-performance open-source RISC-V processor project, and "KunMingHu" architecture is its third generation. Official documentation can be found at: [documentation](https://xiangshan-doc.readthedocs.io/zh-cn/latest/). Currently, the KunMingHu core supports"RV64IMAFDCV_zba_zbb_zbc_zbs_zbkb_zbkc_zbkx_zknd_zkne_zknh_zksed_zksh_svinval_zicbom_zicboz_zicsr_zifencei". The scheduler model and other components will be submitted in subsequent patches. Co-authored-by: Chen Jian<[email protected]> Lv Fang<[email protected]> Co-Authored-By: Khao7342 <[email protected]> Co-Authored-By: huxuan0307 <[email protected]> Co-Authored-By: Ziyue-Zhang <[email protected]> Co-Authored-By: Lin Wang <[email protected]> Co-Authored-By: ict-ql <[email protected]> Co-Authored-By: bdne159 <[email protected]> Co-Authored-By: Zhuke-bosc <[email protected]> Co-Authored-By: 雷电霸王龙 <[email protected]>
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‎clang/test/Driver/riscv-cpus.c‎

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// MCPU-XIANGSHAN-NANHU-SAME: "-target-feature" "+zks" "-target-feature" "+zksed" "-target-feature" "+zksh" "-target-feature" "+svinval"
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// MCPU-XIANGSHAN-NANHU-SAME: "-target-abi" "lp64d"
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// RUN: %clang --target=riscv64 -### -c %s 2>&1 -mcpu=xiangshan-kunminghu | FileCheck -check-prefix=MCPU-XIANGSHAN-KUNMINGHU %s
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// MCPU-XIANGSHAN-KUNMINGHU: "-nostdsysteminc" "-target-cpu" "xiangshan-kunminghu"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+m"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+a"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+f"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+d"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+c"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+v"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zicbom"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zicboz"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zicsr"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zifencei"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zba"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zbb"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zbc"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zbkb"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zbkc"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zbkx"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zbs"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zkn"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zknd"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zkne"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zknh"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zve32f"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zve32x"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zve64d"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zve64f"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zve64x"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zvl128b"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zvl32b"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-feature" "+zvl64b"
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// MCPU-XIANGSHAN-KUNMINGHU-SAME: "-target-abi" "lp64d"
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// We cannot check much for -mcpu=native, but it should be replaced by a valid CPU string.
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// RUN: %clang --target=riscv64 -### -c %s -mcpu=native 2> %t.err || true
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// RUN: FileCheck --input-file=%t.err -check-prefix=MCPU-NATIVE %s
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// RUN: %clang --target=riscv64 -### -c %s 2>&1 -mtune=xiangshan-nanhu | FileCheck -check-prefix=MTUNE-XIANGSHAN-NANHU %s
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// MTUNE-XIANGSHAN-NANHU: "-tune-cpu" "xiangshan-nanhu"
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// RUN: %clang --target=riscv64 -### -c %s 2>&1 -mtune=xiangshan-kunminghu | FileCheck -check-prefix=MTUNE-XIANGSHAN-KUNMINGHU %s
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// MTUNE-XIANGSHAN-KUNMINGHU: "-tune-cpu" "xiangshan-kunminghu"
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// Check mtune alias CPU has resolved to the right CPU according XLEN.
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// RUN: %clang --target=riscv32 -### -c %s 2>&1 -mtune=generic | FileCheck -check-prefix=MTUNE-GENERIC-32 %s
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// MTUNE-GENERIC-32: "-tune-cpu" "generic"

‎clang/test/Misc/target-invalid-cpu-note.c‎

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// RUN: not %clang_cc1 -triple riscv64 -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix RISCV64
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// RISCV64: error: unknown target CPU 'not-a-cpu'
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// RISCV64-NEXT: note: valid target CPU values are: generic-rv64, rocket-rv64, sifive-p450, sifive-p670, sifive-s21, sifive-s51, sifive-s54, sifive-s76, sifive-u54, sifive-u74, sifive-x280, veyron-v1, xiangshan-nanhu{{$}}
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// RISCV64-NEXT: note: valid target CPU values are: generic-rv64, rocket-rv64, sifive-p450, sifive-p670, sifive-s21, sifive-s51, sifive-s54, sifive-s76, sifive-u54, sifive-u74, sifive-x280, veyron-v1, xiangshan-kunminghu, xiangshan-nanhu{{$}}
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// RUN: not %clang_cc1 -triple riscv32 -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE-RISCV32
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// TUNE-RISCV32: error: unknown target CPU 'not-a-cpu'
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// TUNE-RISCV32-NEXT: note: valid target CPU values are: generic-rv32, rocket-rv32, sifive-e20, sifive-e21, sifive-e24, sifive-e31, sifive-e34, sifive-e76, syntacore-scr1-base, syntacore-scr1-max, generic, rocket, sifive-7-series{{$}}
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// RUN: not %clang_cc1 -triple riscv64 -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE-RISCV64
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// TUNE-RISCV64: error: unknown target CPU 'not-a-cpu'
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// TUNE-RISCV64-NEXT: note: valid target CPU values are: generic-rv64, rocket-rv64, sifive-p450, sifive-p670, sifive-s21, sifive-s51, sifive-s54, sifive-s76, sifive-u54, sifive-u74, sifive-x280, veyron-v1, xiangshan-nanhu, generic, rocket, sifive-7-series{{$}}
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// TUNE-RISCV64-NEXT: note: valid target CPU values are: generic-rv64, rocket-rv64, sifive-p450, sifive-p670, sifive-s21, sifive-s51, sifive-s54, sifive-s76, sifive-u54, sifive-u74, sifive-x280, veyron-v1, xiangshan-kunminghu, xiangshan-nanhu, generic, rocket, sifive-7-series{{$}}

‎llvm/lib/Target/RISCV/RISCVProcessors.td‎

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@@ -378,3 +378,31 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu",
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TuneZExtHFusion,
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TuneZExtWFusion,
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TuneShiftedZExtWFusion]>;
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def XIANGSHAN_KUNMINGHU : RISCVProcessorModel<"xiangshan-kunminghu",
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NoSchedModel,
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[Feature64Bit,
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FeatureStdExtI,
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FeatureStdExtZicsr,
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FeatureStdExtZifencei,
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FeatureStdExtM,
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FeatureStdExtA,
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FeatureStdExtF,
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FeatureStdExtD,
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FeatureStdExtC,
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FeatureStdExtZba,
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FeatureStdExtZbb,
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FeatureStdExtZbc,
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FeatureStdExtZbs,
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FeatureStdExtZkn,
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FeatureStdExtZksed,
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FeatureStdExtZksh,
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FeatureStdExtSvinval,
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FeatureStdExtZicbom,
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FeatureStdExtZicboz,
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FeatureStdExtV,
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FeatureStdExtZvl128b],
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[TuneNoDefaultUnroll,
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TuneZExtHFusion,
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TuneZExtWFusion,
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TuneShiftedZExtWFusion]>;

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