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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 |
| 2 | +; RUN: llc --mtriple=loongarch64 --target-abi=lp64s --mattr=-f < %s | FileCheck %s |
| 3 | + |
| 4 | +define signext i32 @convert_float_to_i32(i32 %tmp, float %a) nounwind { |
| 5 | +; CHECK-LABEL: convert_float_to_i32: |
| 6 | +; CHECK: # %bb.0: |
| 7 | +; CHECK-NEXT: addi.d $sp, $sp, -16 |
| 8 | +; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill |
| 9 | +; CHECK-NEXT: bstrpick.d $a0, $a1, 31, 0 |
| 10 | +; CHECK-NEXT: bl %plt(__fixsfsi) |
| 11 | +; CHECK-NEXT: addi.w $a0, $a0, 0 |
| 12 | +; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload |
| 13 | +; CHECK-NEXT: addi.d $sp, $sp, 16 |
| 14 | +; CHECK-NEXT: ret |
| 15 | + %1 = fptosi float %a to i32 |
| 16 | + ret i32 %1 |
| 17 | +} |
| 18 | + |
| 19 | +define signext i32 @convert_double_to_i32(i32 %tmp, double %a) nounwind { |
| 20 | +; CHECK-LABEL: convert_double_to_i32: |
| 21 | +; CHECK: # %bb.0: |
| 22 | +; CHECK-NEXT: addi.d $sp, $sp, -16 |
| 23 | +; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill |
| 24 | +; CHECK-NEXT: move $a0, $a1 |
| 25 | +; CHECK-NEXT: bl %plt(__fixdfsi) |
| 26 | +; CHECK-NEXT: addi.w $a0, $a0, 0 |
| 27 | +; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload |
| 28 | +; CHECK-NEXT: addi.d $sp, $sp, 16 |
| 29 | +; CHECK-NEXT: ret |
| 30 | + %1 = fptosi double %a to i32 |
| 31 | + ret i32 %1 |
| 32 | +} |
| 33 | + |
| 34 | +define signext i32 @convert_fp128_to_i32(i32 %tmp, fp128 %a) nounwind { |
| 35 | +; CHECK-LABEL: convert_fp128_to_i32: |
| 36 | +; CHECK: # %bb.0: |
| 37 | +; CHECK-NEXT: addi.d $sp, $sp, -16 |
| 38 | +; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill |
| 39 | +; CHECK-NEXT: move $a0, $a1 |
| 40 | +; CHECK-NEXT: move $a1, $a2 |
| 41 | +; CHECK-NEXT: bl %plt(__fixtfsi) |
| 42 | +; CHECK-NEXT: addi.w $a0, $a0, 0 |
| 43 | +; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload |
| 44 | +; CHECK-NEXT: addi.d $sp, $sp, 16 |
| 45 | +; CHECK-NEXT: ret |
| 46 | + %1 = fptosi fp128 %a to i32 |
| 47 | + ret i32 %1 |
| 48 | +} |
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