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fhahnfhahn
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!fixup update test after merge, update name.
1 parent 5f1a523 commit 9724538

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-16
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2 files changed

+16
-16
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‎llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1499,7 +1499,7 @@ bool LoopVectorizationLegality::canVectorizeWithIfConvert() {
14991499
// because flags will be dropped when executing them unconditionally.
15001500
// TODO: Results could be improved by considering poison-propagation
15011501
// properties of visited ops.
1502-
auto CanSpeculateOp = [this](Value *Ptr) {
1502+
auto CanSpeculatePointerOp = [this](Value *Ptr) {
15031503
SmallVector<Value *> Worklist = {Ptr};
15041504
SmallPtrSet<Value *, 4> Visited;
15051505
while (!Worklist.empty()) {
@@ -1535,7 +1535,7 @@ bool LoopVectorizationLegality::canVectorizeWithIfConvert() {
15351535
// that it will consider loops that need guarding by SCEV checks. The
15361536
// vectoriser will generate these checks if we decide to vectorise.
15371537
if (LI && !LI->getType()->isVectorTy() && !mustSuppressSpeculation(*LI) &&
1538-
CanSpeculateOp(LI->getPointerOperand()) &&
1538+
CanSpeculatePointerOp(LI->getPointerOperand()) &&
15391539
isDereferenceableAndAlignedInLoop(LI, TheLoop, SE, *DT, AC,
15401540
&Predicates))
15411541
SafePointers.insert(LI->getPointerOperand());

‎llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll‎

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -666,14 +666,14 @@ define void @pr70590_recipe_without_underlying_instr(i64 %n, ptr noalias %dst) {
666666
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
667667
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
668668
; CHECK: [[VECTOR_BODY]]:
669-
; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE6:.*]] ]
669+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE6:.*]] ]
670670
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_LOAD_CONTINUE6]] ]
671671
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq <4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
672672
; CHECK-NEXT: [[TMP1:%.*]] = xor <4 x i1> [[TMP0]], splat (i1 true)
673673
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i1> [[TMP1]], i32 0
674674
; CHECK-NEXT: br i1 [[TMP2]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
675675
; CHECK: [[PRED_LOAD_IF]]:
676-
; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX1]], 0
676+
; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 0
677677
; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP3]], poison
678678
; CHECK-NEXT: [[TMP23:%.*]] = getelementptr [5 x i8], ptr @c, i64 0, i64 [[TMP4]]
679679
; CHECK-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP23]], align 1
@@ -684,7 +684,7 @@ define void @pr70590_recipe_without_underlying_instr(i64 %n, ptr noalias %dst) {
684684
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP1]], i32 1
685685
; CHECK-NEXT: br i1 [[TMP5]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2:.*]]
686686
; CHECK: [[PRED_LOAD_IF1]]:
687-
; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[INDEX1]], 1
687+
; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[INDEX]], 1
688688
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], poison
689689
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr [5 x i8], ptr @c, i64 0, i64 [[TMP11]]
690690
; CHECK-NEXT: [[TMP26:%.*]] = load i8, ptr [[TMP25]], align 1
@@ -695,7 +695,7 @@ define void @pr70590_recipe_without_underlying_instr(i64 %n, ptr noalias %dst) {
695695
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP1]], i32 2
696696
; CHECK-NEXT: br i1 [[TMP7]], label %[[PRED_LOAD_IF3:.*]], label %[[PRED_LOAD_CONTINUE4:.*]]
697697
; CHECK: [[PRED_LOAD_IF3]]:
698-
; CHECK-NEXT: [[TMP17:%.*]] = add i64 [[INDEX1]], 2
698+
; CHECK-NEXT: [[TMP17:%.*]] = add i64 [[INDEX]], 2
699699
; CHECK-NEXT: [[TMP18:%.*]] = add i64 [[TMP17]], poison
700700
; CHECK-NEXT: [[TMP19:%.*]] = getelementptr [5 x i8], ptr @c, i64 0, i64 [[TMP18]]
701701
; CHECK-NEXT: [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
@@ -706,16 +706,16 @@ define void @pr70590_recipe_without_underlying_instr(i64 %n, ptr noalias %dst) {
706706
; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP1]], i32 3
707707
; CHECK-NEXT: br i1 [[TMP9]], label %[[PRED_LOAD_IF5:.*]], label %[[PRED_LOAD_CONTINUE6]]
708708
; CHECK: [[PRED_LOAD_IF5]]:
709-
; CHECK-NEXT: [[INDEX:%.*]] = add i64 [[INDEX1]], 3
710-
; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[INDEX]], poison
709+
; CHECK-NEXT: [[TMP30:%.*]] = add i64 [[INDEX]], 3
710+
; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP30]], poison
711711
; CHECK-NEXT: [[TMP13:%.*]] = getelementptr [5 x i8], ptr @c, i64 0, i64 [[TMP12]]
712712
; CHECK-NEXT: [[TMP27:%.*]] = load i8, ptr [[TMP13]], align 1
713713
; CHECK-NEXT: [[TMP28:%.*]] = insertelement <4 x i8> [[TMP22]], i8 [[TMP27]], i32 3
714714
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE6]]
715715
; CHECK: [[PRED_LOAD_CONTINUE6]]:
716716
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = phi <4 x i8> [ [[TMP22]], %[[PRED_LOAD_CONTINUE4]] ], [ [[TMP28]], %[[PRED_LOAD_IF5]] ]
717717
; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[TMP0]], <4 x i8> zeroinitializer, <4 x i8> [[WIDE_LOAD]]
718-
; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDEX1]]
718+
; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDEX]]
719719
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP15]], i32 0
720720
; CHECK-NEXT: store <4 x i8> [[PREDPHI]], ptr [[TMP16]], align 4
721721
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
@@ -763,14 +763,14 @@ define void @recipe_without_underlying_instr_lanes_used(i64 %n, ptr noalias %dst
763763
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
764764
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
765765
; CHECK: [[VECTOR_BODY]]:
766-
; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE6:.*]] ]
766+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE6:.*]] ]
767767
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_LOAD_CONTINUE6]] ]
768768
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq <4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
769769
; CHECK-NEXT: [[TMP1:%.*]] = xor <4 x i1> [[TMP0]], splat (i1 true)
770770
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i1> [[TMP1]], i32 0
771771
; CHECK-NEXT: br i1 [[TMP2]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
772772
; CHECK: [[PRED_LOAD_IF]]:
773-
; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX1]], 0
773+
; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 0
774774
; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP9]], poison
775775
; CHECK-NEXT: [[TMP23:%.*]] = getelementptr [5 x i8], ptr @c, i64 0, i64 [[TMP16]]
776776
; CHECK-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP23]], align 1
@@ -781,7 +781,7 @@ define void @recipe_without_underlying_instr_lanes_used(i64 %n, ptr noalias %dst
781781
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[TMP1]], i32 1
782782
; CHECK-NEXT: br i1 [[TMP3]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2:.*]]
783783
; CHECK: [[PRED_LOAD_IF1]]:
784-
; CHECK-NEXT: [[TMP26:%.*]] = add i64 [[INDEX1]], 1
784+
; CHECK-NEXT: [[TMP26:%.*]] = add i64 [[INDEX]], 1
785785
; CHECK-NEXT: [[TMP29:%.*]] = add i64 [[TMP26]], poison
786786
; CHECK-NEXT: [[TMP30:%.*]] = getelementptr [5 x i8], ptr @c, i64 0, i64 [[TMP29]]
787787
; CHECK-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP30]], align 1
@@ -792,7 +792,7 @@ define void @recipe_without_underlying_instr_lanes_used(i64 %n, ptr noalias %dst
792792
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP1]], i32 2
793793
; CHECK-NEXT: br i1 [[TMP4]], label %[[PRED_LOAD_IF3:.*]], label %[[PRED_LOAD_CONTINUE4:.*]]
794794
; CHECK: [[PRED_LOAD_IF3]]:
795-
; CHECK-NEXT: [[TMP17:%.*]] = add i64 [[INDEX1]], 2
795+
; CHECK-NEXT: [[TMP17:%.*]] = add i64 [[INDEX]], 2
796796
; CHECK-NEXT: [[TMP18:%.*]] = add i64 [[TMP17]], poison
797797
; CHECK-NEXT: [[TMP19:%.*]] = getelementptr [5 x i8], ptr @c, i64 0, i64 [[TMP18]]
798798
; CHECK-NEXT: [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
@@ -803,8 +803,8 @@ define void @recipe_without_underlying_instr_lanes_used(i64 %n, ptr noalias %dst
803803
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP1]], i32 3
804804
; CHECK-NEXT: br i1 [[TMP5]], label %[[PRED_LOAD_IF5:.*]], label %[[PRED_LOAD_CONTINUE6]]
805805
; CHECK: [[PRED_LOAD_IF5]]:
806-
; CHECK-NEXT: [[INDEX:%.*]] = add i64 [[INDEX1]], 3
807-
; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], poison
806+
; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[INDEX]], 3
807+
; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[TMP31]], poison
808808
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr [5 x i8], ptr @c, i64 0, i64 [[TMP7]]
809809
; CHECK-NEXT: [[TMP27:%.*]] = load i8, ptr [[TMP8]], align 1
810810
; CHECK-NEXT: [[TMP28:%.*]] = insertelement <4 x i8> [[TMP22]], i8 [[TMP27]], i32 3
@@ -815,7 +815,7 @@ define void @recipe_without_underlying_instr_lanes_used(i64 %n, ptr noalias %dst
815815
; CHECK-NEXT: [[PREDPHI7:%.*]] = select <4 x i1> [[TMP0]], <4 x i64> zeroinitializer, <4 x i64> poison
816816
; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i64> [[PREDPHI7]], i32 3
817817
; CHECK-NEXT: store i64 [[TMP12]], ptr [[AUX]], align 8
818-
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDEX1]]
818+
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDEX]]
819819
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP10]], i32 0
820820
; CHECK-NEXT: store <4 x i8> [[PREDPHI]], ptr [[TMP11]], align 4
821821
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4

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