@@ -45,6 +45,13 @@ using namespace llvm;
4545#define GET_REGINFO_MC_DESC
4646#include " MipsGenRegisterInfo.inc"
4747
48+ namespace {
49+ class MipsWinCOFFTargetStreamer : public MipsTargetStreamer {
50+ public:
51+ MipsWinCOFFTargetStreamer (MCStreamer &S) : MipsTargetStreamer(S) {}
52+ };
53+ } // end namespace
54+
4855// / Select the Mips CPU for the given triple and cpu name.
4956StringRef MIPS_MC::selectMipsCPU (const Triple &TT, StringRef CPU) {
5057 if (CPU.empty () || CPU == " generic" ) {
@@ -84,7 +91,12 @@ static MCSubtargetInfo *createMipsMCSubtargetInfo(const Triple &TT,
8491static MCAsmInfo *createMipsMCAsmInfo (const MCRegisterInfo &MRI,
8592 const Triple &TT,
8693 const MCTargetOptions &Options) {
87- MCAsmInfo *MAI = new MipsELFMCAsmInfo (TT, Options);
94+ MCAsmInfo *MAI;
95+
96+ if (TT.isOSWindows ())
97+ MAI = new MipsCOFFMCAsmInfo ();
98+ else
99+ MAI = new MipsELFMCAsmInfo (TT, Options);
88100
89101 unsigned SP = MRI.getDwarfRegNum (Mips::SP, true );
90102 MCCFIInstruction Inst = MCCFIInstruction::createDefCfaRegister (nullptr , SP);
@@ -127,6 +139,8 @@ static MCTargetStreamer *createMipsNullTargetStreamer(MCStreamer &S) {
127139
128140static MCTargetStreamer *
129141createMipsObjectTargetStreamer (MCStreamer &S, const MCSubtargetInfo &STI) {
142+ if (STI.getTargetTriple ().isOSBinFormatCOFF ())
143+ return new MipsWinCOFFTargetStreamer (S);
130144 return new MipsTargetELFStreamer (S, STI);
131145}
132146
@@ -186,6 +200,8 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTargetMC() {
186200 TargetRegistry::RegisterNullTargetStreamer (*T,
187201 createMipsNullTargetStreamer);
188202
203+ TargetRegistry::RegisterCOFFStreamer (*T, createMipsWinCOFFStreamer);
204+
189205 // Register the MC subtarget info.
190206 TargetRegistry::RegisterMCSubtargetInfo (*T, createMipsMCSubtargetInfo);
191207
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