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remove obsolete getImmXXEncoding() function definitions
1 parent 60db197 commit 975630c

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4 files changed

+24
-76
lines changed

4 files changed

+24
-76
lines changed

llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp

Lines changed: 0 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -224,45 +224,6 @@ uint64_t PPCMCCodeEmitter::getImmEncoding(const MCInst &MI, unsigned OpNo,
224224
return 0;
225225
}
226226

227-
unsigned PPCMCCodeEmitter::getImm16Encoding(const MCInst &MI, unsigned OpNo,
228-
SmallVectorImpl<MCFixup> &Fixups,
229-
const MCSubtargetInfo &STI) const {
230-
const MCOperand &MO = MI.getOperand(OpNo);
231-
if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
232-
233-
// Add a fixup for the immediate field.
234-
addFixup(Fixups, IsLittleEndian ? 0 : 2, MO.getExpr(), PPC::fixup_ppc_half16);
235-
return 0;
236-
}
237-
238-
uint64_t PPCMCCodeEmitter::getImm34Encoding(const MCInst &MI, unsigned OpNo,
239-
SmallVectorImpl<MCFixup> &Fixups,
240-
const MCSubtargetInfo &STI,
241-
MCFixupKind Fixup) const {
242-
const MCOperand &MO = MI.getOperand(OpNo);
243-
assert(!MO.isReg() && "Not expecting a register for this operand.");
244-
if (MO.isImm())
245-
return getMachineOpValue(MI, MO, Fixups, STI);
246-
247-
// Add a fixup for the immediate field.
248-
addFixup(Fixups, 0, MO.getExpr(), Fixup);
249-
return 0;
250-
}
251-
252-
uint64_t
253-
PPCMCCodeEmitter::getImm34EncodingNoPCRel(const MCInst &MI, unsigned OpNo,
254-
SmallVectorImpl<MCFixup> &Fixups,
255-
const MCSubtargetInfo &STI) const {
256-
return getImm34Encoding(MI, OpNo, Fixups, STI, PPC::fixup_ppc_imm34);
257-
}
258-
259-
uint64_t
260-
PPCMCCodeEmitter::getImm34EncodingPCRel(const MCInst &MI, unsigned OpNo,
261-
SmallVectorImpl<MCFixup> &Fixups,
262-
const MCSubtargetInfo &STI) const {
263-
return getImm34Encoding(MI, OpNo, Fixups, STI, PPC::fixup_ppc_pcrel34);
264-
}
265-
266227
unsigned PPCMCCodeEmitter::getDispRIEncoding(const MCInst &MI, unsigned OpNo,
267228
SmallVectorImpl<MCFixup> &Fixups,
268229
const MCSubtargetInfo &STI) const {

llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h

Lines changed: 0 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -51,19 +51,6 @@ class PPCMCCodeEmitter : public MCCodeEmitter {
5151
uint64_t getImmEncoding(const MCInst &MI, unsigned OpNo,
5252
SmallVectorImpl<MCFixup> &Fixups,
5353
const MCSubtargetInfo &STI) const;
54-
unsigned getImm16Encoding(const MCInst &MI, unsigned OpNo,
55-
SmallVectorImpl<MCFixup> &Fixups,
56-
const MCSubtargetInfo &STI) const;
57-
uint64_t getImm34Encoding(const MCInst &MI, unsigned OpNo,
58-
SmallVectorImpl<MCFixup> &Fixups,
59-
const MCSubtargetInfo &STI,
60-
MCFixupKind Fixup) const;
61-
uint64_t getImm34EncodingNoPCRel(const MCInst &MI, unsigned OpNo,
62-
SmallVectorImpl<MCFixup> &Fixups,
63-
const MCSubtargetInfo &STI) const;
64-
uint64_t getImm34EncodingPCRel(const MCInst &MI, unsigned OpNo,
65-
SmallVectorImpl<MCFixup> &Fixups,
66-
const MCSubtargetInfo &STI) const;
6754
unsigned getDispRIEncoding(const MCInst &MI, unsigned OpNo,
6855
SmallVectorImpl<MCFixup> &Fixups,
6956
const MCSubtargetInfo &STI) const;

llvm/lib/Target/PowerPC/PPCInstr64Bit.td

Lines changed: 0 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -14,30 +14,6 @@
1414
//===----------------------------------------------------------------------===//
1515
// 64-bit operands.
1616
//
17-
def s16imm64 : Operand<i64> {
18-
let PrintMethod = "printS16ImmOperand";
19-
let EncoderMethod = "getImm16Encoding";
20-
let ParserMatchClass = PPCS16ImmAsmOperand;
21-
let DecoderMethod = "decodeSImmOperand<16>";
22-
let OperandType = "OPERAND_IMMEDIATE";
23-
}
24-
def u16imm64 : Operand<i64> {
25-
let PrintMethod = "printU16ImmOperand";
26-
let EncoderMethod = "getImm16Encoding";
27-
let ParserMatchClass = PPCU16ImmAsmOperand;
28-
let DecoderMethod = "decodeUImmOperand<16>";
29-
let OperandType = "OPERAND_IMMEDIATE";
30-
}
31-
def s17imm64 : Operand<i64> {
32-
// This operand type is used for addis/lis to allow the assembler parser
33-
// to accept immediates in the range -65536..65535 for compatibility with
34-
// the GNU assembler. The operand is treated as 16-bit otherwise.
35-
let PrintMethod = "printS16ImmOperand";
36-
let EncoderMethod = "getImm16Encoding";
37-
let ParserMatchClass = PPCS17ImmAsmOperand;
38-
let DecoderMethod = "decodeSImmOperand<16>";
39-
let OperandType = "OPERAND_IMMEDIATE";
40-
}
4117
def tocentry : Operand<iPTR> {
4218
let MIOperandInfo = (ops i64imm:$imm);
4319
}

llvm/lib/Target/PowerPC/PPCRegisterInfo.td

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -748,6 +748,13 @@ def s16imm : Operand<i32> {
748748
let DecoderMethod = "decodeSImmOperand<16>";
749749
let OperandType = "OPERAND_IMMEDIATE";
750750
}
751+
def s16imm64 : Operand<i64> {
752+
let PrintMethod = "printS16ImmOperand";
753+
let EncoderMethod = "getImmEncoding<PPC::fixup_ppc_half16>";
754+
let ParserMatchClass = PPCS16ImmAsmOperand;
755+
let DecoderMethod = "decodeSImmOperand<16>";
756+
let OperandType = "OPERAND_IMMEDIATE";
757+
}
751758
def PPCU16ImmAsmOperand : AsmOperandClass {
752759
let Name = "U16Imm"; let PredicateMethod = "isU16Imm";
753760
let RenderMethod = "addU16ImmOperands";
@@ -759,6 +766,13 @@ def u16imm : Operand<i32> {
759766
let DecoderMethod = "decodeUImmOperand<16>";
760767
let OperandType = "OPERAND_IMMEDIATE";
761768
}
769+
def u16imm64 : Operand<i64> {
770+
let PrintMethod = "printU16ImmOperand";
771+
let EncoderMethod = "getImmEncoding<PPC::fixup_ppc_half16>";
772+
let ParserMatchClass = PPCU16ImmAsmOperand;
773+
let DecoderMethod = "decodeUImmOperand<16>";
774+
let OperandType = "OPERAND_IMMEDIATE";
775+
}
762776
def PPCS17ImmAsmOperand : AsmOperandClass {
763777
let Name = "S17Imm"; let PredicateMethod = "isS17Imm";
764778
let RenderMethod = "addS16ImmOperands";
@@ -773,6 +787,16 @@ def s17imm : Operand<i32> {
773787
let DecoderMethod = "decodeSImmOperand<16>";
774788
let OperandType = "OPERAND_IMMEDIATE";
775789
}
790+
def s17imm64 : Operand<i64> {
791+
// This operand type is used for addis/lis to allow the assembler parser
792+
// to accept immediates in the range -65536..65535 for compatibility with
793+
// the GNU assembler. The operand is treated as 16-bit otherwise.
794+
let PrintMethod = "printS16ImmOperand";
795+
let EncoderMethod = "getImmEncoding<PPC::fixup_ppc_half16>";
796+
let ParserMatchClass = PPCS17ImmAsmOperand;
797+
let DecoderMethod = "decodeSImmOperand<16>";
798+
let OperandType = "OPERAND_IMMEDIATE";
799+
}
776800
def PPCS34ImmAsmOperand : AsmOperandClass {
777801
let Name = "S34Imm";
778802
let PredicateMethod = "isS34Imm";

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