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fix a bracket error
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llvm/lib/Target/AMDGPU/SIInstructions.td

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -2200,17 +2200,17 @@ foreach pred = [NotHasTrue16BitInsts, UseFakeTrue16Insts] in {
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(VGPRImm<(i16 imm)>:$imm),
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(V_MOV_B32_e32 imm:$imm)
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>;
2203-
}
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2205-
// FIXME: Workaround for ordering issue with peephole optimizer where
2206-
// a register class copy interferes with immediate folding. Should
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// use s_mov_b32, which can be shrunk to s_movk_i32
2204+
// FIXME: Workaround for ordering issue with peephole optimizer where
2205+
// a register class copy interferes with immediate folding. Should
2206+
// use s_mov_b32, which can be shrunk to s_movk_i32
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2209-
foreach vt = [f16, bf16] in {
2210-
def : GCNPat <
2211-
(VGPRImm<(vt fpimm)>:$imm),
2212-
(V_MOV_B32_e32 (vt (bitcast_fpimm_to_i32 $imm)))
2213-
>;
2208+
foreach vt = [f16, bf16] in {
2209+
def : GCNPat <
2210+
(VGPRImm<(vt fpimm)>:$imm),
2211+
(V_MOV_B32_e32 (vt (bitcast_fpimm_to_i32 $imm)))
2212+
>;
2213+
}
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}
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}
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