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[DAG] visitXOR - convert ISD::ABS matching to SDPatternMatch
Lets us remove all the horrible commutative handling
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llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 5 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -10001,15 +10001,11 @@ SDValue DAGCombiner::visitXOR(SDNode *N) {
1000110001

1000210002
// fold Y = sra (X, size(X)-1); xor (add (X, Y), Y) -> (abs X)
1000310003
if (!LegalOperations || hasOperation(ISD::ABS, VT)) {
10004-
SDValue A = N0Opcode == ISD::ADD ? N0 : N1;
10005-
SDValue S = N0Opcode == ISD::SRA ? N0 : N1;
10006-
if (A.getOpcode() == ISD::ADD && S.getOpcode() == ISD::SRA) {
10007-
SDValue A0 = A.getOperand(0), A1 = A.getOperand(1);
10008-
SDValue S0 = S.getOperand(0);
10009-
if ((A0 == S && A1 == S0) || (A1 == S && A0 == S0))
10010-
if (ConstantSDNode *C = isConstOrConstSplat(S.getOperand(1)))
10011-
if (C->getAPIntValue() == (VT.getScalarSizeInBits() - 1))
10012-
return DAG.getNode(ISD::ABS, DL, VT, S0);
10004+
SDValue X, Y;
10005+
if (sd_match(N, m_Xor(m_Add(m_Value(X), m_Value(Y)), m_Deferred(Y))) &&
10006+
sd_match(Y, m_Sra(m_Specific(X),
10007+
m_SpecificInt(VT.getScalarSizeInBits() - 1)))) {
10008+
return DAG.getNode(ISD::ABS, DL, VT, X);
1001310009
}
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}
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