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AMDGPU: Use srcvalue and delete Ignore complex pattern (#161359)
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7 files changed

+1
-22
lines changed

7 files changed

+1
-22
lines changed

llvm/lib/Target/AMDGPU/AMDGPUGISel.td

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@@ -13,10 +13,6 @@
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include "AMDGPU.td"
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include "AMDGPUCombine.td"
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def gi_ignore :
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GIComplexOperandMatcher<s32, "selectIgnore">,
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GIComplexPatternEquiv<Ignore>;
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def sd_vsrc0 : ComplexPattern<i32, 1, "">;
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def gi_vsrc0 :
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GIComplexOperandMatcher<s32, "selectVSRC0">,

llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

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@@ -4312,8 +4312,6 @@ bool AMDGPUDAGToDAGISel::SelectBITOP3(SDValue In, SDValue &Src0, SDValue &Src1,
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return true;
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}
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bool AMDGPUDAGToDAGISel::SelectIgnore(SDValue In) const { return true; }
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SDValue AMDGPUDAGToDAGISel::getHi16Elt(SDValue In) const {
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if (In.isUndef())
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return CurDAG->getUNDEF(MVT::i32);

llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h

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@@ -305,8 +305,6 @@ class AMDGPUDAGToDAGISel : public SelectionDAGISel {
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void SelectWAVE_ADDRESS(SDNode *N);
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void SelectSTACKRESTORE(SDNode *N);
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bool SelectIgnore(SDValue In) const;
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protected:
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// Include the pieces autogenerated from the target description.
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#include "AMDGPUGenDAGISel.inc"

llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

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@@ -4266,14 +4266,6 @@ Register AMDGPUInstructionSelector::copyToVGPRIfSrcFolded(
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return Src;
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}
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InstructionSelector::ComplexRendererFns
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AMDGPUInstructionSelector::selectIgnore(MachineOperand &Root) const {
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// Don't render anything.
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ComplexRendererFns Renderers;
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Renderers.emplace();
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return Renderers;
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}
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///
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/// This will select either an SGPR or VGPR operand and will save us from
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/// having to write an extra tablegen pattern.

llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h

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Original file line numberDiff line numberDiff line change
@@ -166,9 +166,6 @@ class AMDGPUInstructionSelector final : public InstructionSelector {
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MachineOperand Root, MachineInstr *InsertPt,
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bool ForceVGPR = false) const;
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InstructionSelector::ComplexRendererFns
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selectIgnore(MachineOperand &Root) const;
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InstructionSelector::ComplexRendererFns
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selectVCSRC(MachineOperand &Root) const;
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llvm/lib/Target/AMDGPU/SIInstrInfo.td

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1710,8 +1710,6 @@ def VOP3PMadMixBF16Mods : ComplexPattern<untyped, 2, "SelectVOP3PMadMixBF16Mods"
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def VINTERPMods : ComplexPattern<untyped, 2, "SelectVINTERPMods">;
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def VINTERPModsHi : ComplexPattern<untyped, 2, "SelectVINTERPModsHi">;
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def Ignore : ComplexPattern<untyped, 0, "SelectIgnore">;
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//===----------------------------------------------------------------------===//
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// SI assembler operands
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//===----------------------------------------------------------------------===//

llvm/lib/Target/AMDGPU/SOPInstructions.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1617,7 +1617,7 @@ def S_BARRIER_WAIT : SOPP_Pseudo <"s_barrier_wait", (ins i16imm:$simm16), "$simm
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}
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def S_BARRIER_LEAVE : SOPP_Pseudo <"s_barrier_leave",
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(ins), "", [(int_amdgcn_s_barrier_leave (Ignore))] > {
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(ins), "", [(int_amdgcn_s_barrier_leave (i16 srcvalue))] > {
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let SchedRW = [WriteBarrier];
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let simm16 = 0;
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let fixed_imm = 1;

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